Design And Implementation Of Integrated Heterogeneous Computing Processing System

Mobile communication has maintained rapid development for a long time,and different types of signal processing methods are constantly being put into practical use.The software and hardware architecture of the traditional signal processing platform is designed only for one signal processing service.Therefore,as the communication technology continues to evolve,the burden of maintaining different software and hardware platforms will become heavier and heavier.Therefore,it has become a trend to develop an integrated signal processing platform that is applicable to a variety of signal processing scenarios,capable of performing multiple task processing at the same time,and having tailorable and scalable characteristics.This paper develops and verifies the integrated computing platform with dynamic reconfigurable features.The main work of the thesis includes the following aspects:Firstly,an integrated heterogeneous computing system architecture with dynamic reconfigurable features and CPU+FPGA structure is designed,and the basic working process of the integrated system is expounded.The hardware chassis architecture,CPU software architecture and FPGA logic architecture of the integrated system are introduced.Second,the design and implementation of the FPGA board and its management system based on ZYNQ are completed.The board is designed for CPU+FPGA heterogeneous computing,and has a rich 40 G Ethernet and PCIe interface interconnected with the CPU,and supports dynamic reconfigurable features,providing sufficient bitstream buffering and high-speed configuration interfaces.Thirdly,a general data exchange structure description method based on Chisel is proposed.The data exchange structure is realized by configuring and interconnecting the basic units based on the basic,reloadable and scalable basic switching nodes.The method can quickly complete the description and deployment of the data exchange structure,and provide basic support for quickly implementing the architecture modification according to the requirements and algorithm changes.Fourthly,a general FPGA dynamic reconfigurable planning strategy is proposed and a dynamically reconfigurable link is implemented.The dynamic reconfigurable planning strategy divides the FPGA into several independent resource blocks,and each resource block is interconnected through a data exchange network,and each independent resource block can be dynamically reconfigured independently.The dynamically reconfigurable link implements a sorting and high-speed configuration interface for resource block configuration.The planning strategy and the reconstruction link jointly realize the efficient dynamic configuration of the FPGA at runtime.This thesis proposes an architecture of an integrated heterogeneous computing system,implements a FPGA board,the core component fo the integrated system,and proposes a consistent data structure description method for fast iteration,which has positive effect in engineering.