Design And Research Of Sigma Delta ADC For Sensor Interface Circuit

In this thesis,a Sigma-Delta analog-to-digital converter with low voltage,low power consumption and high precision is designed.After comprehensively comparing the advantages and disadvantages of several Sigma-Delta ADC structures,a two-step incremental feedforward structure is used to design the Sigma-Delta modulator.Two-step operation combined with hardware multiplexing to minimize the design scale of analog circuits and reduce power consumption.The incremental structure enabled the ADC to reset the memory of each part of the ADC before each data conversion,so as to improve the overflow phenomenon of the integrator.Moreover,the register of the digital filter have been designed with unequal word length according to the oversampling rate,so as to shorten the word length of the intermediate data of the filter and reduce the use of registers.This improved the area of digital circuit integrated wiring.The filter used a third-order CIC filter,and a calibration algorithm is designed to improve the offset and gain errors,and the design algorithm of the digital part is optimized.The method of multi-cycle multiplexing arithmetic units is used to reduce the number of arithmetic units to reduce the area of the digital part.Based on CSMC 0.18 m CMOS process to complete the design of each module unit circuit.Hspice and Modelsim were used to simulate the analog part of the circuit and the digital part of the circuit,and the ADMS platform was used to simulate the mixed signal.The final results showed that the circuit performance of each part reached the design requirements.The noise-free resolution of the modulator is 17.3 bits,the oversampling rate of the ADC is adjustable,and according to the specific application environment,the data update rate ranges from 6.51 Hz to104.2Hz.The maximum resolution of the ADC is 18 bits,the power supply voltage is 1.6V,the typical operating current is 19.3μA,the total power consumption of the analog circuit is 31.9μW,the digital circuit power consumption is 1.53μW,and the total power consumption is less than33.43μW.The analog circuit layout is drawn and designed.The digital part of the code design was combined with circuit logic and layout,which verified the correctness of the digital circuit.The overall layout area of the final circuit is 602μm·532μm.