Font Size: a A A

Design And Implementation Of Forward Neural Network Simulation Circuit Based On Brain-like Device

Posted on:2021-03-14Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhangFull Text:PDF
GTID:2428330614463731Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the advent of the era of 5G,the computing performance of the underlying hardware is the core of information processing which acts as an indispensable link in the operation of 5G.On one hand,due to the characteristics of Von Neumann Bottleneck and Moore's law,the interaction barrier between the computing part and the storage part will lead to the slow processing speed of the computer and the increase of energy consumption,as well as the consumption of a long time and the increase of operating cost of the equipment in the execution of some real-time data(image,video,audio,and other information).On the other hand,the biological neural network in the processing of information shows the characteristics of high-efficiency,parallel and celerity,which not only inspired people to imagine the computing platform of the future but also promoted the neural network software and hardware continuous change and improvement.Therefore,it is of great potential to study a new brain-like chip that can save resources and improve work efficiency.Based on the principles of synaptic learning,and memristor in biological synapse,the following works have been carried out in this thesis:The dynamic model of the HP memristor is used as the design basis of the forward neural network simulation circuit,and the polymorphic characteristics of the memristor are verified by MATLAB simulation,and two new forward neural network simulation circuit models based on polymorphic memristors are proposed.(1)Considering the limited weight of the existing memristor and the poor stability of the device,a 256 bits HP memristor model is used to construct a stable double memristors structure with storage weights.Combined with technology of low-power rail-to-rail operational amplifier and register,an absolute value circuit with the separation of modulus and polarity and a weight-network matrix circuit with memristors as the core to perform floating-point arithmetic is designed.The multi-layer memristor neural network is realized by an activation function written in Verilog-A.In this way,the circuit design adopts the input method of parallel and analog-signal processing,besides,the control is simple,and no intermediate data buffer is needed.Experimental results show that this method can effectively improve the stability and operation efficiency of the artificial neural network with memristors as the core.(2)Considering the phenomenon of leakage current when constructing neural network with memristor array and the characteristics of consuming lots of hardware resources when constructing neural network hardware with traditional devices.Combined with low-power operational amplifier and register technology,a biomimetic forward neural network operation circuit is designed with 1 Transistor 1 Memristor weight structure unit built by an ideal memristor and a high-performance MOS tube model.Positive and negative floating-point signals can be transmitted between layers of the circuit,and the functions of weights addition,bias signal setting,classification and signal activation can be realized in this design.The comparison between the simulation experiment and the host computer shows that the model can improve the performance of the forward artificial neural network through high speed signal processing.In addition,in the case of realizing the same neural network structure,not only the leakage current phenomenon is eliminated partly,but also the hardware resources are saved.
Keywords/Search Tags:Memristor, Artificial neural network, Matrix, Weight, Performance
PDF Full Text Request
Related items