Fault Tolerant Design Of TSV In 3D-ICs

With the continuous progress of the technology level in the IC industry,the performance and integration degree of the chip in the IC are improved according to Moore's law.In the vertical direction,3D chips use TSV technology to stack multiple chips,which continues Moore's law.In the period when Moore's law is about to fail,the chip area of 3D integrated circuit technology is reduced,the interconnect length is shortened and the bandwidth is high,which is considered as an important research direction beyond beyond Moore's law.However,due to the connection and binding of TSV to the chip in the vertical direction,it is easy to introduce various defects such as cavities,perforations,short circuits and so on in the process of perforation and binding.Moreover,TSV often shows the characteristics of clustering failure in yield test.The above factors lead to the yield of 3D chip greatly affected by TSV yield.In general,by adding redundant TSV,the fault TSV is discarded directly,and the redundant TSV is used to configure built in self repair circuit,replaces the failed TSV to improve the yield of 3D chip,but this kind of method has many problems,such as redundant TSV occupies a large amount of area overhead,high manufacturing cost,insufficient utilization of redundant TSV and excessive delay of redundant TSV.For the above problems,this dissertation considers improving chip yield from the aspect of TSV fault tolerance.In the fault-tolerant stage after the completion of binding and testing,a new fault-tolerant structure and a new method are used,and the way of function TSV and signal TSV multiplexing is used for fault-tolerant,so as to reduce the area cost and hardware cost.The main contents of this dissertation are as follows:(1)This dissertation introduces the research background and current situation of threedimensional integrated circuit.What's more,this dissertation points out the redundancy strategy of TSV in matrix grid and cellular grid.It also points out the main problems and challenges in the research.(2)A TSV cellular fault-tolerant structure based on time division multiple access(TDMA)is proposed.TSV often uses matrix arrangement and cellular arrangement which can make TSV arrangement more compact with low affect in the communication interference.Time-division multiple access is also used in purpose of discarding redundant TSV by cutting time-slot in time dimension.The fault-tolerant design is carried out by transforming signal TSV into redundant TSV.The simulation result shows that the fault coverage of the scheme is 30% higher than the one-dimensional chain time division multiplexing scheme and the area overhead is reduced by 10.4%.(3)A fault-tolerant structure of N: 1 single channel TSV based on TDMA is presented.In the method above,the TSV in a single group array is designed to be a single TSV multiplexing structure from multiple to TSV.Only one signal TSV is used in a single group.One redundant TSV is used for the fault-tolerance.This method keeps improving the fault coverage to 100% comparing with the structure above.It also reduces the area and hardware overhead of TSV structure by 70.4%.