Design And Optimization Of High-speed Serial Link Based On Channel Operating Margin

With the rapid rise of 5G and the Internet of Things in recent years,data transmission rate for Ethernet communication is increasingly attracting more and more attention.Accordingly,backplane communication,the main communication method for Ethernet communication,is in demand for high-speed growth.Moreover,As a critical part of Ethernet communication,the importantance of backplane channel is gradually arouse people's attention.In this context,the previous channel specification masks often lead to over-design of channel when guiding channel manufacturing.Therefore it is of great application value to study appropriate masks for channel representation method.Before introducing the equalizers for eliminating inter-symbol interference,this paper first investigates the signal integrity of high-speed serial links.Under this circumstance,an important parameter for evaluating channel called Channel Operating Margin(COM)wil be introduced as well as the modeling and simulation of high-speed serial links based on COM.The package transmission line length and crosstalk in COM model will be changed in order to simulate the variation of different channel emulation COM for different influencing factors.Moreover,for the convenience of the comparision between COM-and BER-way of channel-compliance evaluation,parameters adapted in the traditional BER-based eye diagram analysis tool are adjusted using the parameters achieved in COM architecture.Futhermore,the similarities and differences between COM and eye diagram analysis tools in evaluating the channel are analyzed for the sake of obtaining the validity of the COM analysis method.Finally,by changing the configuration of the serial link in the case of NRZ signaling,including the package,TX equalizer,RX equalizer,and noise and jitter models,the COM model can meet the transmission requirements in the case of PAM4 signaling,given a 25 GBd rate.The reference design of the PAM4 serial link,which in turn doubles the signal rate of the link transmission.In addition,this dissertation also introduces a 20 Gb/s decision feedback equalizer(DFE)based on the TSMC 90 nm process.By analyzing and comparing different DFE structures,the half-rate per-processed DFE structure is selected as the DEF structure of this paper.The pre-simulation results show that the 20 Gb/s pseudo-random sequence passing through the backplane channel has serious inter-symbol interference,naturally is the eye diagram basically closed.While after DFE equalizing,the signal is revovered and the eye diagram is improved,indicating the DFE of this paper: it can reduce inter-symbol interference,improve signal quality and improve signal eye diagram.