Study On The Simulation Of Structural Optimization And Doping Design Of Small Size Finfet

The Moore's Law has been promoting the remarkable progress of semiconductor industry.Due to its excellent electrostatic,the Fin field effect transistor（FinFET）architecture,as a mainstream device technology,has been scaling continuously to a small feature size.However,further scaling may encounter many issues due to the parasitic component limitations and so on.This paper mainly scales the critical dimension of FinFET to limit by the Technology Computer Aided Design（TCAD）simulation,considering the impact of key parameters on the device performance,further exploring the underlying mechanism and measuring the interaction to obtain a balance point or a viable optimization window for high performance and low power.The detailed work is as follows:Firstly,process flow is established through the ideal structure and doping definition.Considering basic mathematical physics equations,parasitic effects and convergence,the combination and correction of analytical models are implemented.From the industrial second-generation FinFET technology（Technology 1）,along with gradual scaling,the impact of FinFET geometry and doping on electrical characteristics was explored.By careful parameter selection,a small-sized FinFET was obtained.The transfer characteristic（I_d-V_g）curve is then shifted in parallel to adjust the metal gate work function（WF）to obtain different threshold voltage(V_th)devices.Taking this as a starting point,the subthreshold swing(SS_sat),the relationship between external resistance(R_ext)and effective current(I_eff)under different supply voltage(V_dd)and source-drain extension regions doping gradient（Sipgrdnt）are studied.A new optimization window is proposed for different V_th devices.And the low threshold voltage（LVT）device is determined as the best optimization object.Finally,the design of experiment（DOE）was carried out by selecting the structure and doping parameters that need to be optimized.Regression analysis reveals the constraint relationship between the parameters and obtains the process optimization window.Combining the N/PMOS results to get the best performance of ring oscillator（RO）,with respect to the industrial first generation of FinFET technology（Technology 0）,it can provide>48%frequency gain at given power consumption,or reduce power consumption by>55%at a given frequency,which effectively improves the device scalability.