The Design And FPGA Implementation Of A New Stochastic Edge Detection System

Stochastic computing is a better way to replace traditional binary computing.Because of its low cost,it can show information data with probability.At present,due to the limited battery life,energy efficiency is one of the main design goals of wireless or wearable devices.By reducing computing time and power consumption,energy efficiency can be improved.In order to reduce power consumption,the overall performance of the system needs to be reduced.However,in reality,more and more electronic devices need higher performance.Random computing is one of the technologies to improve the efficiency of energy utilization.It reduces the area and power consumption by sacrificing the accuracy of computing.Stochastic computing is suitable for applications based on human senses,such as image and audio processing,because human beings cannot distinguish between approximate and accurate values.Approximate calculation involves a trade-off between accuracy and power consumption.So Stochastic computing is especially suitable for image processing.The content of this thesis is mainly divided into the following two aspects:On the one hand,based on the traditional sobel edge detection,this thesis proposes a better stochastic computing architecture of stochastic sobel edge detection circuit.The stochastic implemented sobel edge detection circuit will use a lot of random number generators.The random number generator(RNG),such as linear feedback shift register(LFSR),occupies a large area of stochastic circuit,which affects the accuracy of stochastic computing.Therefore,it is necessary to share The method of sharing random number generator can reduce the overall circuit area,but the shared random number generator will affect the results because of the correlation of random numbers.To solve this problem,this thesis adds the cyclic shift technology of random number generator to the stochastic sobel edge detection.At the same time,the simulation test shows that the number of bits in LFSR is8 and 10,and the cyclic shift changes from 0 to n-1 The optimal cyclic shift point will greatly reduce the area and power consumption of the whole circuit.In the ASIC implementation of TSMC 45 nm library,63.5% of the total area and 93.1% of the power consumption can be saved compared with the accurate traditional edge detection.Compared with the stochasticedge detection method without sharing random number source,54.8% of the area and 61.5%of the dynamic power consumption can be reduced,Compared with the sharing method,it can reduce the delay by 13%.On the other hand,FPGA is used as the main control chip to complete the image detection.The general way is: PC and FPGA interact,and finally FPGA processes the final data and judges,and finally displays the image characteristics through the VGA control module.From the test results,we can see that the effect of using circular mobile shared random number source to realize the picture is better.At the same time,this paper makes statistics on the resources of sobel edge detection.sobel realized by using cyclic shift shared random number generator can achieve lower resource utilization,and the required logic utilization rate of the design is reduced by 48.6% compared with the accurate traditional edge detection.Compared with the LFSR stochastic computing based on unshared,this design can reduce register by up to 60%.