| With the development of semiconductor,silicon-based devices have been unable to meet the work requirements of higher power density because they are closing to the material performance limit.Due to much higher critical breakdown electric field,thermal conductivity and electron saturation speed,Silicon Carbide has become the mainstream material of power semiconductor,especially in high temperature,high voltage,high frequency,radiation and many other extreme environments.Thanks to high input resistance,good temperature stability and large safe operating area,SiC MOSFETs are widely used in applications like solid-state transformers,rail transit,smart grids,high-voltage transmission.So the research of SiC MOSFETs has gradually become a hotspot at home and abroad.Low-voltage and medium-voltage SiC MOSFETs have been commercialized already,researches on high-voltage SiC MOSFETs are also becoming matured.Nowadays,many research teams are aiming to the field of ultrahigh voltage SiC MOSFETs.Based on this development trend,this paper aims to optimization design and research for 10kV SiC MOSFET.The static and dynamic characteristics of the device are comprehensively simulated and optimized by the Silvaco TCAD simulation platform,including the transfer characteristics,output characteristics,blocking characteristics,capacitance characteristics,gate charge characteristics,switching characteristics and so on.And based on the domestic manufacturing platform of SiC power devices,the drawing of device layout and design of the main manufacturing process have been completed.Firstly,the epitaxial layer doping concentration and thickness of the 10kV SiC MOSFET are estimated by theoretical analysis and calculations to meet the requirements of design.Then,the parameters are optimized by Silvaco's 2D simulator Atlas,including epitaxial layer parameters,width of JFET region,length of channel,thickness of gate oxide and cell pitch.The optimal value of the concentration and thickness of drift region are selected as 5×1014cm-3 and 100μm.The width of the JFET region is 3.5μm.The channel length is 0.8μm.The simulation results show that the threshold voltage is 2.3V.The simulation result gives an 185mΩ·cm2 specific on-resistance with gate-source voltage of 20V and drain-source current density of20A/cm2.Subsequently,the field limiting ring terminal is applied to the 10kV SiC MOSFET.The number and width of the rings are optimized by Atlas simulator.The final blocking voltage of FLR terminal is 13.2kV.Secondly,the dynamic performance of the 10kV SiC MOSFET is studied,including characteristics of capacitance,gate-drain charge and switching performance.The results have shown the effects of JFET region width,channel length and gate oxide thickness on dynamic performance.When the drain-source voltage is 5kV,the input capacitance,output capacitance and reverse transfer capacitance are 2.6nF,54.4pF and9pF,respectively.The gate-drain charge is 94.7nC.The turn-on and turn-off time are67ns and 675ns,respectively.The corresponding turn-on and turn-off losses are 1.1mJ and 4.3mJ,respectively.Finally,the conduction capabilities of the strip cells and square cells are briefly analyzed,and corresponding layouts of 10 kV SiC MOSFET are drawn.Main steps of the production process are also introduced.In conclusion,the static and dynamic characteristics of 10kV SiC MOSFET are studied by theoretical analysis and numerical simulation,and the layout and main fabrication process are designed.All these have provided an important reference for internal research of ultrahigh voltage SiC MOSFETs. |