Research On SiC MOSFET Device Design And Reliability

Compared with traditional silicon(Si)IGBTs,silicon carbide(SiC)power MOSFETs can further improve the efficiency and power density of power electronic systems in high-temperature environments due to their excellent material properties.Today,SiC MOSFETs are gradually being used in high-power devices including electric vehicles(EV)and hybrid electric vehicles(HEV).Among them,the high-speed development of electric vehicles has attracted much attention.Nowadays,the highvoltage long-term battery life has become an important development trend,which has increased the demand for power supply equipment with a voltage rating of 1200 V and above.Under this background,the research of 1200 V SiC VDMOS in practical application becomes very important.In order to study the reliability of 1200 V mediμm current level devices,the SiC VDMOS cell with the same performance as commercial mediμm current level devices is designed by simulation software,and the physical model related to simulation is adjusted and fitted.Then the reliability of 1200 V mediμm current level commercial devices is analyzed in detail by combining experiment with simulation.At first this paper fits and adjusts the physical models related to SiC VDMOS simulation.Since the thermal characteristics analysis is indispensable in the reliability study,this paper introduces the self-heating model and thermal boundary conditions.Then,the core device parameters such as the width and doping concentration of the JFET region,the thickness and the doping concentration of the Pwell region,the channel length and the thickness of the gate oxide layer in the 1200 V SiC VDMOS cell structure were simulated and designed to ensure static performance.Then we carried out the terminal design,the terminal design uses a gradient pitch field limit ring structure.The finally simulated device is consistent with the commercial device of 1200 V mediμm current level in all aspects of on-resistance,rated current and reverse withstand voltage.And then,we conduct reliability test experiments on 1200V/41 A commercial devices.Firstly,the related principles of short circuit and UIS test are introduced,and a standard test platform for short circuit and UIS is built according to the IEC standard.Then we conduct a short-circuit test on the device while the bus voltage remains the same.By continuously increasing the short-circuit pulse time until the device has a gate-source failure,before the gate-source failure occurs,the device has a degeneration in gate-source voltage and an increase in tail current.After comparing and analyzing the test results with the simulation results,it is concluded that the failure of the gate source after the shortcircuit test is not only related to the high electric field of the gate but also related to the high temperature concentration of the gate.After that,we conducted a single UIS test and repetitive UIS test.After a single UIS test,failure analysis of the failed device was performed,such as opening the cap and scanning electron microscope(SEM).Results show the gate oxide layer of the failed device and the interlayer dielectric remained intact.The reason for the failure was that the metal above the dielectric layer melted due to high temperature,and then through simulation located the hot spot of the device which verified the experimental results.After the repeatability test,the drain-source leakage current of the device increases.It is verified through theoretical analysis and simulation that the increase in drain-source leakage current is caused by the hole injection into the gate oxide layer.The research done in this paper helps to understand the reliability failure mechanism of 1200 V SiC MOSFET devices.