Design And Optimization Of Three-demention Double-channel LDMOS

Lateral Double-diffused Metal Oxide Semiconductor（LDMOS）has been widely used for its advantages of high voltage resistance,high operating current,excellent high frequency performance and good integration characteristics.However,with the development of power integrated circuits in the direction of low power consumption,high power density and high integration,the performance requirements of LDMOS devices are also more stringent.How to get a high breakdown voltage and low on-resistance,high reliability LDMOS devices have become the focus of current research.In this thesis,a novel three-dimensional double-channel LDMOS device is designed.Firstly,the simulation software Sentaurus is used to model and simulate the three-dimensional double-channel LDMOS device in order to determine the key structure and process parameters which can meet the specifications.It focuses on optimization of trench gate,planar gate,metal field plate,plane gate field plate,N-grade concentration and HVTN concentration.The reliability of the three-dimensional double-channel LDMOS device is also studied.It is found that the Kirk effect and the conduction of the parasitic NPN tube lead to low hold voltage and on-state breakdown voltage.Adding a low doped N-buffer near the drain side can increase hold on voltage and extend safe operate area.The hot electron injection and interface state at the corner of the planar gate channel are responsible for the degradation of threshold voltage and on-resistance,altering the angle of plane gate can reduce the peak value of impact ionization ratio and improve hot carrier reliability.Simulation result shows that the threshold voltage of three-dimensional double-channel LDMOS device is 1.3V,the breakdown voltage is 41.4V,the specific on-resistance is 10.54mΩ?mm²,the second breakdown current is2.3?10^-3A/μm,the on-state breakdown voltage is 34.8V and the peak value of impact ionization ratio under the worst stress is 1.84?10²⁷ cm^-3/s,which meets the requirements of specifications.The device achieves a good compromise between breakdown voltage,conduction loss and reliability.