FPGA-based Eddy Current Testing Hardware System Design

Eddy current detection is one of the common non-destructive testing methods.The eddy current detection hardware system is geneally consist of an excitation generating circuit,an eddy current detecting probe,a signal receiving circuit,a data transmission circuit,and a digital control core.In the detection,the system detects defects on the surface and near the surface of the conuctor by exciting an eddy current field on the surface of it.In this thesis,the eddy current detecting principle and the eddy current detecting hardware circuit are researched.The eddy current detecting hardware system based on FPGA is designed to realize the basic functions of the portable low-power eddy current detecting system.The paper mainly studies the design of hardware circuits and digital algorithms in eddy current detection system.Firstly,the domestic and international portable eddy current instrument function parameters,and national standard manual requirements are combined to analyse performance indicators of the eddy current detecting instrument,and determine the design requirements of the hardware circuit.Than,by analysing the eddy current detecting principle and the equivalent model of the detection circuit,along with the low power consumption design requirements of portable instruments,propose an excitation signal generation circuit based on DDS,a detection signal receiving circuit based on AD acquisition and a data transmission circuit based on USB2.0 controller.The FPGA core control platform is used to complete the logic control and algorithm design of the hardware circuit.The orthogonal local oscillator signal is generated by the Cordic algorithm and the FIR digital low-pass filter is designed by the window function method to realize the digital quadrature detection of the eddy current detection signal.By building the hardware test platform to evaluate the design results of the eddy current testing system from the hardware performance.The test results show that the hardware circuit realizes the function of excitation signal generation and detection signal receiving,the FPGA control timing is consistent with the chip manial,the FPGA algorithm part completes the orthogonal local oscillator signal generation and low-pass filter design.this eddy current detect system achieves the expected design indicators.