Digital control in modular masterless multi-phase microprocessor power supplies

With the rapid development of microprocessors, the specifications for their power supplies become more and more stringent. It is required to maintain the output voltage within a tight tolerance with presence of large transient load current steps and slew rates.; Digitally controlled modular masterless multi-phase architecture based on identical DC-DC converter modules that communicate over a digital bus is presented. The advantages of the modular architecture include simple system configuration, scalability to an arbitrary number of phases, improved reliability, and reduced system cost based on identical digitally controlled modules.; In the modular architecture, the functionalities performed by a master controller are distributed into the identical digital controllers in each phase. Digital voltage mode control is applied for voltage regulation, together with the digital active droop method for adaptive voltage positioning. The chain control algorithm is designed to obtain the average phase current in a manner of moving window averaging. Currents in each phase are regulated to the average current by a negative feedback loop.; A parallel structure is developed for the voltage and current sharing regulation loops to avoid the bandwidth limitations in inner and outer loop structures. Closed loop modeling of a multi-phase converter with identical parameters in each phase shows that the voltage and current regulation loops are decoupled. The loop gains for voltage and current regulation alone are derived for compensator design. Simulation and statistical analysis are used to verify that the designed compensator meets system specifications within the given parameter distributions.; Digital control approaches to mitigate other impacts of parameter mismatches are also studied. Competition control ensures a steady state operation condition with all voltage and current loops active in the presence of voltage sensing errors. The zero-error-bin method makes it possible to design the closed loop bandwidth higher than a fraction of the single phase switching frequency with mismatched inductor current waveforms. The calibrated current sensing method is presented with good accuracy and essentially lossless operation.; Experiments in a two-phase 12 V to 1.5 V 15 A synchronous buck converter controlled by an FPGA are performed to verify the system structure, loop design and control approaches presented in this thesis.