Techniques to improve the quality of simulation in the design and validation of microprocessors

Simulation is widely used to analyze the performance, power consumption, reliability, and functionality of a processor before the actual silicon prototype becomes available. In this thesis we develop techniques to improve the quality of simulation for microprocessor design and validation. The first part of this thesis deals with simulation in design; the second part deals with simulation in validation.; Program phase classification is used both to improve a simulation's accuracy and to reduce its cost during microarchitecture design. In the first part of the thesis, we develop metrics and methods for performing program phase classification and for evaluating different program phase classification schemes. First, we propose the Confidence Interval of estimated Mean (CIM), a metric based on statistical sampling theory, to evaluate the quality of a given phase classification scheme and to compare different phase classification schemes. Second, we use CIM to analyze the effect of three parameters---interval size, sample size, and the number of phases and their interactions---on the accuracy of the performance estimate and simulation cost in statistical sampling based microarchitecture simulation. Finally, we propose a program phase classification scheme based on Extended Calling Context Tree (ECCT) that is 1500 times faster than the current state-of-the-art phase classification scheme, SimPoint. The quality of phases detected by our scheme equals or exceeds that of the phases detected by SimPoint.; In the second part of the thesis, we develop techniques to generate and analyze test cases for simulation-based functional validation of microprocessors. Firstly, we propose a metamodeling-based microprocessor validation (MMV) environment to model the microprocessor at the architecture level of abstraction and to automatically generate random and coverage-directed tests from the models. Secondly, we perform a probabilistic analysis on the ability of three code coverage metrics namely statement coverage, branch coverage and MCDC to find eight types of design hugs commonly found during microprocessor validation. Finally, we devise an experiment to understand the effectiveness of random test suites in detecting design bugs in microprocessors. Most of the design bugs were easily detected by short random tests, while a small number of bugs were found to be very hard to detect. Increasing the length of the random test program from 10 to 10,000 instructions did not increase the probability of exposing the hard-to-find bugs.