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Graphene Interface Engineering: Surface/Substrate Modifications cum Metal Contact Exploration

Posted on:2013-06-24Degree:Ph.DType:Thesis
University:The Chinese University of Hong Kong (Hong Kong)Candidate:Wang, XiaomuFull Text:PDF
GTID:2451390008486322Subject:Engineering
Abstract/Summary:
Graphene is an appealing material in both science and technology. Its distinct electronic, thermal and mechanical properties have stimulated enormous scientific interest. In particular, graphene-based field-effect transistors (GFET) have been developed rapidly and are now considered an option for post-silicon electronics. In contrast to traditional semiconductors, the unique two dimensional structure of graphene offers the possibility of studying the interface characteristics for its proximity to the top surface and interface between graphene and the outside environment. We are thus interested in understanding graphene surface and interfacial issues associated with electronic structure, carrier transport and related phenomena on a nano-scale. In this thesis, we investigate both experimentally and theoretically the mechanisms of graphene interfacial couplings to different substrates, charge injection from metal electrodes and its interplay with inert adsorbates.;At first, few layer graphene's (FLG) electronic properties are adjusted efficiently and controllably through functionalizing its top surface. Both n-type and p-type doped exfoliated graphene sheets are present by virtue of adsorbing organic molecules. Additionally, the doping effects induced by electron beam (EB) irradiation are also studied. We find that by irradiating graphene with EB, graphene p-n junctions can be formed if EB irradiation is applied across a single graphene sheet containing regions with different layers.;Secondly, the crucial roles played by the supported substrate in graphene applications are meticulously interrogated. The existence of charge impurities and ripples adversely affects the mobility of high quality mechanically exfoliated graphene on commercially available SiO2/Si wafers inferior to its theoretical limit. To suppress the deleterious substrate effect, we utilize self-assembled monolayers to passivate the SiO2/Si substrate surface. After diminishing the unwanted scattering origins by this method, an increase in carrier mobility by nearly one order of magnitude (up to 47,000 cm 2/Vs) is obtained.;Furthermore, the electronic properties of the interfaces between graphene and various metal electrodes are systematically investigated. Our study unambiguously reveals that a low electrical resistance as well as a linear current-voltage relation is not always granted for GFETs. Interestingly, for graphene on SiO 2/Si passivated with highly-ordered OTMS, both 'space charge region limited' and 'ohmic' contacts can be obtained with a single metal electrode. We also find that by utilizing voltage bias, the contact can be reversibly altered between high resistance and low resistance. We ascribe the phenomenon to graphene's cone energy dispersion relationship as well as the vanishing density of states at the Dirac points. Our results herald a new avenue for achieving high density non-volatile graphene memory devices.
Keywords/Search Tags:Graphene, Metal, Surface, Interface, Substrate, Electronic
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