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Test cost reduction techniques

Posted on:2006-06-07Degree:Ph.DType:Thesis
University:University of MinnesotaCandidate:Sun, XiaoyunFull Text:PDF
GTID:2458390008454761Subject:Engineering
Abstract/Summary:PDF Full Text Request
Continuing increases in the size and performance of integrated circuits have led to a significant relative increase in the cost and complexity of testing integrated circuits. Test costs have risen to a level comparable to manufacturing costs. New types of defects that impact the performance and reliability of integrated circuits, but not the functionality are now a significant concern. New test methods that complement traditional approaches are required to reduce test costs and detect these new types of defects. This dissertation focuses on the two more recent test techniques, current-based test and logic self-test techniques.; We develop several independent, but related, techniques to reduce the cost and improve the effectiveness of both static Iddq and dynamic Iddt current-based test techniques. Recent research has focused on using current ratios to improve the effectiveness of Iddq and Iddt tests. We show that the test performance of current-ratio-based tests is significantly affected by the correlation between the two currents of different test vectors. We build two practical models to estimate the correlation. Based on these models, we propose test vector selection methods to improve the defect detection ability of ratio-Iddq testing by selecting test vector pairs with the highest correlation. We extend a recently developed Iddt technique, the energy consumption ration (ECR). We apply ECR test to two high performance manufactured circuits. We also develop a Design-For-Test technique which improves the performance of ECR test by partitioning the circuit. Lastly, we develop a low cost current measurement technique which combines low pass filtering and sampling to measure the average supply current.; The last part of the thesis focuses on reducing the cost of logic test through test set compression. We develop a method that combines dictionary coding and partial LFSR reseeding to improve the efficiency of test data compression. We also develop a fast matrix calculation method which significantly reduces the computation complexity for solving the linear equations for partial LFSR reseeding.
Keywords/Search Tags:Test, Cost, Integrated circuits, Techniques, Performance
PDF Full Text Request
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