Highly Linear and Efficient Radio Frequency Power Amplifiers with a New Circuit Synthesis Technique

Power amplifiers and other large-signal circuits are known to suffer from inherent transistor nonlinearities in linearity and power efficiency performance. In a cost-driven product, such as a cellular handset, system-level techniques are not desirable to address these issues due to added expense and complexity. Therefore, circuit-level techniques have been the main research focus to combat amplifier distortions. However, in previous circuit-level techniques, performances are bounded fundamentally to inherent transistor characteristics, making them still dependent on transistor technology. As a result, present-day linear amplifiers, especially cellular radio frequency (RF) power amplifiers (PAs), are manufactured with linear but expensive technologies such as GaAs rather than nonlinear but low-cost technologies such as CMOS.;To realize true linearity independent of the transistor technology and to tailor cost without performance loss, circuit-level synthesis approach is proposed. This includes the conception of a new circuit synthesis technique, development of its comprehensive-theories and algorithms, and circuit demonstration of the unique abilities and characteristics crucial to overcome amplifier/circuit nonlinearities.;Circuit prototypes are also designed and fabricated according to the new circuit synthesis technique. These include an amplifier with arbitrary current-voltage transfer characteristics, a highly linear and efficient 900 MHz Class AB CMOS RF PA, and a non-linear capacitor network with arbitrary capacitor-voltage characteristics. Measured results show not only flexible circuit characteristics independent on the transistor technology but also unprecedented performance in linearity and dynamic range when configured as linear amplifiers/circuits, demonstrating the effectiveness of the circuit synthesis technique. Furthermore, the CMOS RF PA prototype shows state-of-the-art linearity performance comfortably meeting and exceeding the toughest industrial standards (--40 dBc for WCDMA adjacent channel power ratio (ACPR1)) while maintaining at least 38.5% peak power added efficiency (PAE) at an output power of 24 dBm. At an output power of 24.91 dBm this prototype still complies with the 3GPP specifications (--33 dBc for WCDMA ACPR1) for an unprecedented PAE of 41.6%. Excellent average PAE is also expected since the prototype consumes a quiescent current of only 24.2 mA. These are the best performances ever reported for CMOS RF PAs and it is virtually equivalent to that of a state-of-the-art commercial III-V counterpart, showing the feasibility of migrating CMOS to GaAs without the anticipated loss of performance.;In addition to the above circuits, the new circuit synthesis technique is broadly applicable to other analog/RF circuits including op-amps, analog filters, mixers, analog-to-digital converters, digital-to-analog converters, analog signal processing, circuits pre-, post- or parallel distorters for RF PAs, low noise amplifiers, and voltage controlled oscillators.