Asynchronous design for digital signal processing architectures

Asynchronous designs, which do not require an external clocking signal, have the potential to give better performance than comparable synchronous designs in situations for which global synchronization with a high speed clock becomes a limiting factor to system throughput. Automatic synthesis and the ability to decouple the timing considerations from the design of computational blocks make this approach particularly attractive in reducing design effort when systems become complex. The simplicity of design plus the potential performance advantages motivate our interest in designing signal processing systems using the fully asynchronous approach.; We describe a systematic procedure for designing fully asynchronous architectures from a structural description and an automated algorithm for synthesizing optimum asynchronous interconnection circuits with minimum hardware and maximum performance. Two computer-aided design tools, a synthesis program and an event-drive simulator designed especially for emulating hardware operations built of asynchronous component, have been developed to facilitate design automation for asynchronous systems.; We have applied the design procedure to both programmable architectures and dedicated-hardware design and have fabricated a chip set for implementing a high sampling rate adaptive filter using the asynchronous design techniques. We discuss the issues relevant to the design of an asynchronous programmable processor, such as pipelining, data flow control, program flow control, feedback and initialization, I/O interface, and architectures. Simulation results for an asynchronous version of a commercial digital signal processor are given. We also address the system-level tradeoffs of using synchronous design vs. asynchronous design. From the test results of our chips, we quantify the performance comparison for one technology point. The main contribution of this work is that we have provided a system design alternative to the traditional clocked scheme, and we have demonstrated that it works, both in theory and in practice.