Design And Implementation Of Chaotic Encryption Card

Chaos has been widely used in encryption algorithm design because of its inherent randomness and sensitivity of initial value,and chaotic cryptography has developed rapidly in the past decades.However,chaotic cryptography still seems to be underdeveloped in the current severe information security situation.On the one hand,a large number of chaotic ciphers have obvious drawbacks which are vulnerable to attacks even if high-dimensional chaotic ciphers.On the other hand,higher dimensional chaotic systems require more operations after digitization,which is overwhelming for general computer processors,resulting in unacceptable encryption speed.Therefore,this thesis studied the design and implementation of a chaotic encryption card for personal computers aiming at these problems.The encryption card adopts the sinusoidally modulated chaotic stream cipher that can resist both selective ciphertext attacks and separate conquest attacks,providing sufficient security.Secondly,the encryption card and the computer are interconnected by the PCIe bus,which has enough transmission bandwidth.The main works of this thesis are as follows:1.A non-degenerate three-dimensional discrete time chaotic anti-control system is proposed.On this basis,a sinusoidally modulated self-synchronized chaotic stream cipher is proposed.One of the chaotic variables is used to mask plaintext information by a series of operations like sine,multiplying,rounding and modular operation with 8.The sine function is used as a non-linear step,which effectively improves the security of the cipher.After the ciphertext is generated,it needs to be fed back to the chaotic system.On the one hand,it constitutes a closed-loop encryption to improve the correlation of the cipher,and on the other hand,it acts as a common term to achieve self-synchronization.2.A fix-point method to the cypher is proposed in which the chaotic variable is represented by a 64-bit fixed-point number as Q32.32.The optimization of the sinusoidal function in terms of hardware is discussed,as well as the impact of the number of CORDIC elements on the chaotic system.3.The design and implementation method of chaotic encryption card is studied,which is divided into software and hardware.In the aspect of hardware,data flow inside FPGA is realized by the AXI bus and DMA controller.AXIS and AXI-Lite interface are adopted in the cypher module.The former interface is used to transmit data and the cipher mode can be modified in real time by the latter.For the software side,the driver functions are mainly used for device initializing,configuration and transmission,while the windowed interactive interface is realized by the MFC framework.4.Perform behavioral simulation on each module to verify the functional correctness of the design.The chaos encryption card is tested with pictures,videos and other files,and great results are obtained.