Heterogeneous Parallel Implementation Of Infrared Imaging Based Urban Building Detection And Recognition

Infrared imaging has the advantages of strong anti-interference ability,good concealment,high efficiency and cost ratio,all-day capability,etc.,so it has certain advantages in the application of aircraft navigation and guidance.The application of infrared imaging technology to the detection and recognition of urban buildings is an important part of visual navigation,which can meet the needs of autonomous and accurate navigation and collision avoidance of aircraft,and has a certain practical value.In the above application background and demand of aircraft navigation and collision avoidance,the infrared imaging principle and infrared radiation characteristics are analyzed from the perspective of physics,and then the infrared imaging characteristics and urban background characteristics are analyzed.In the face of the disadvantages of infrared image,such as low resolution,unclear image hierarchy and low contrast compared with visible light image,and urban scene,which has the recognition difficulties such as buildings may be denser,shapes and sizes may be diverse,and they may be similar to each other,a multi-scale multi-stage detection method is proposed: firstly,the target building and its surrounding buildings are identified as a whole in a large scale,and then the small scale local area is detected,identified and located,which based on the multi-scale idea for the specific scene of interfering buildings beside the identified target buildings.For preliminary recognition,target buildings and interference buildings as a whole,multi-scale idea should be used to extract the features of the whole for recognition.For local recognition,because in the local subgraph,the geometric differences between buildings are relatively large,geometric features are used for recognition.This method avoids the difficulty of distinguishing the background of large scale buildings,and simplifies the problem by using multi-scale multi-stage strategy.The algorithm is implemented based on Windows platform,and the recognition rate is 99% in 640 frame sequence diagram verified by field measurement data set.For practical application scenarios such as aircraft navigation and collision avoidance,the algorithm requires high real-time performance due to the relatively fast operation speed of the aircraft.According to the resource difference between windows platform and DSP platform,the characteristics of DSP hardware and the analysis of algorithm data quantity,the memory allocation scheme of algorithm on DSP platform is designed,and the transplantation of algorithm DSP platform is realized.On this basis,the algorithm is optimized from algorithm improvement,code implementation optimization,compiler and other aspects,the correctness of the memory allocation scheme and the effectiveness of the algorithm on the DSP platform are verified by experiments.The algorithm is measured to achieve a processing speed of 36 ms per frame on the DSP platform,which is basically real-time.Due to the complexity of the natural scene,various kinds of weather,light,atmospheric transmission and other interferences,it brings severe challenges to the precise navigation of the aircraft.When faced with the algorithm with more computation and higher computational complexity,the real-time optimization of aircraft navigation requires higher requirements.Only the optimization of DSP platform,there are still some limitations.Based on the above requirements,from the perspective of hardware architecture design,try to add other processor cooperative optimization algorithms on the basis of DSP + FPGA architecture.Because ASIC chip has the advantages of low power consumption,light weight,high performance and high reliability,while meeting the constraints of embedded information processor such as power consumption,volume,weight,etc.,it can use the image processing function of ASIC instead of software to realize,so it can use the combination of software and hardware to deploy the algorithm to improve the real-time performance of the algorithm.Based on the multi-scale target detection and recognition algorithm,the algorithm deployment scheme of DSP + FPGA + ASIC architecture is designed,using Label ASIC to replace the software tag algorithm in DSP,and other algorithms are still deployed in DSP,and realizes the function of DSP calling tag ASIC through FPGA.The experimental results show that the algorithm can achieve a processing speed of 33 ms per frame,so the use of ASIC is helpful to improve the real-time performance of the algorithm.Based on the architecture of DSP + FPGA + ASIC,the system realizes the functions of DSP calling Label ASIC,Rotation ASIC and Multi-level filtering ASIC,and the effectiveness of the system is verified by the results of image processing of label,rotation and filtering.The system supports more algorithm deployment,meets the programmable characteristics of the embedded information processor,and provides a new optimization scheme for the algorithm in the way of combination of hardware and software.The deployment architecture provides a solution for the design of information processing system that meets the requirements of high reliability,high performance and low power consumption,and also lays a certain foundation for the future SOC(system on a chip).