Research And Design Of Frequency Programmable CC/CV Buck Converter

With the popularity and wide application of smart devices,the power management chip embedded in it has attracted the attention of the majority of manufacturers.A good power management chip means that smart devices can have the advantages of fast charging,long battery life,and low power consumption.As an indispensable part of power chips,DC-DC converters are favored by virtue of its powerful functionality.However,the traditional DC-DC converter can merely work in a single model and can only output a single constant voltage or constant current.This article closely follows the current development trend of power chips,and designs a CVCC step-down DC-DC converter XD2001A,featuring adjustable maxium output current and programmable frequency.This article first makes a detailed analysis and discussion of the research background of this design,and gives a brief description of the power chip category.Then introduced the Buck circuit topology,control mode,and CCM,DCM,BCM three working modes when chip reaching a stable working state.Then the chip designed in this paper is analyzed from the overall system plan,and the key technologies used in XD2001A,synchronous rectification technology,external synchronization technology,frequency programmable technology and maximum output current adjustable technology,are explained one by one.The average current mode is selected as the control method of the chip.Considering the complexity of the traditional average current mode dual-loop separate design and the stability analysis in the later period,this paper makes improvements to the traditional average current mode by adopting the average current mode of the current control loop and the voltage control loop.Based on this control method,gives the overall architecture of the chip and analyzes the stability of the loop,and proposes a corresponding compensation scheme.Under the premise that the basic circuit topology is determined,the overall structure and key technology are clear,and the chip stability is good,a specific design scheme is given for the key sub-circuit modules in this paper,and the working principle and design starting point of the designed module are explained.After the completion of the above work,the overall simulation of the designed chip was verified to ensure that the chip can work normally,and each key performance index meets expectations.After completing the circuit design and verification,a partial layout design scheme of XD2001A is given.Synthesize the above analysis content,this paper designs the chip XD2001A based on the 0.35μm BCD process.In this design,the Cadence software in Linux is used for circuit design and size determination,and then the Spectre tool in Cadence software is used to further verify the design indicators and further debug and modify the circuit to ensure that the module circuit and the overall circuit work normally.The simulation conclusion shows that the input range of the chip is 6～36V,the output range is 1.2～24V,the maximum achievable output current is 5A,and the maximum output current can be set by adjusting the external pin voltage of the chip.Working frequency can be set by external synchronization method or changing external resistance method,the system has good stability,and the overall working efficiency can reach more than 90%.The expected set goal of this design has been reached.