Design And Implementation Of Ground Unit Test Equipment Based On Gigabit Ethernet

The ground unit test equipment is a special test equipment for the large-capacity missile-borne recorder,which is responsible for various functions and performance checks before the recorder is launched and the stored data readback after the recorder is recovered from the ground.Starting from the performance and functional indicators of the ground unit test equipment,this paper studies the data transmission rate,stability and reliability,and finally forms a ground unit test with FPGA as the central control unit,Gigabit Ethernet as the high-speed transmission interface and other peripheral acquisition interfaces.equipment.This paper designs ground unit test equipment on the basis of Gigabit Ethernet according to actual application requirements,and combines the current research status at home and abroad to design and design the data interaction between ground unit test equipment and recorder and the data communication with PC-side upper computer.the study.First of all,this article introduces the overall framework of the ground unit test;then,the design and research of the interactive interface with the recorder,respectively introduces the hardware circuit design of the LVDS interface,the 422 interface and the AD acquisition interface in detail,and the power module The selection and design of the architecture are introduced in detail.Theoretical calculations and full verification of distortion and attenuation are carried out in the process of LVDS long-line transmission.The output signal is pre-emphasized in the time domain by adding a driver,which effectively solves the problem of signal attenuation during the long-line transmission.The automatic compensation of the transmission signal effectively solves the problem of signal distortion in the process of long-line transmission.If there are multiple ’0’s and ’1’s in the data transmission process,the circuit may cause signal transmission errors due to voltage levels or capacitance parasitics.In order to avoid multiple ’0’ and ’1’ problems in the data continuously,adopt 8B /10 B encoding and decoding method effectively solves the problem of the balance of ’0’ and ’1’,and further ensures the reliability of long-term data transmission;finally,the communication interface with the upper computer is studied,and the communication interface with the upper computer adopts Gigabit Ethernet Network transmission,according to the in-depth understanding of the structure and working principle of the MAC layer,the FPGA+PHY method is used to realize the high-speed Ethernet interface design from the Ethernet MAC layer to the PHY layer,which makes the MAC controller highly transparent and feature-specific.At the same time,in the user logic layer(application layer,network layer,and transport layer),in order to facilitate the distinction of various types of valid data,the encapsulation of valid data is completed by using a custom protocol frame,and in view of the unreliability of the UDP/IP transmission protocol,through Add a request/retransmission mechanism to achieve fast and stable data transmission.By building a test platform,a complete closed-loop test was carried out on the functional performance of the ground unit test equipment,each communication interface and the Ethernet transmission interface.The final test results show that the LVDS long-term transmission is stable and reliable,and the Ethernet transmission with request retransmission mechanism is stable,and the transmission rate can reach 30 MBps.