Design Of Image Target Acquisition And Detection System

Image-accurate guided weapons are widely used in today?s wars.Among them,the acquisition and detection of image-borne targets are the key premise of image guidance,which can provide the accuracy and real-time performance of the target.This is crucial for the ballistic weapons to adjust the trajectory to hit the target important.In this thesis,taking the guidance of a conventional missile-borne weapon as an application background,a set of image target acquisition and detection system is designed.Under laboratory conditions,the system can achieve the two functions of high-definition image acquisition and image target detection and matching,providing practical applications.A feasible solution.Relying on the requirements and planning of image acquisition and processing in the project group project,this Thesis focuses on high-speed digital image imaging technology and image feature detection algorithms,designing an image acquisition and detection system with CMOS sensor and FPGA control processor as the core,In-depth research on the key technology of imaging system and the algorithm of local feature detection.This Thesis discusses mainly two aspects: the acquisition of high-definition images,the detection and matching of image features.The photosensitive device in the image acquisition system is a CMOS image sensor-CMV4000,and the core device for drive control and data processing of the entire system is FPGA-VIRTEX7.This part mainly studies the key technologies such as clock driving control and LVDS data correction module in the image of the system,and designs and implements each module in the image acquisition with the help of hardware description language.Through experimental simulation,the image acquisition system can work stably,with clear imaging,high quality,flexible control and low power consumption,which can meet the application requirements of the project group project for target imaging.For the detection and matching of missile-borne targets,it has the characteristics of high real-time detection,accurate position positioning,and large changes in image scale.In the target detection of image data,the SIFT algorithm with scale invariance is mainly studied,and the SIFT algorithm is parallelized on the FPGA platform.Design to improve the real-time detection.In the feature point matching,the SIFT algorithm has a problem of wrong matching.In this thesis,the random sampling consistent idea is used to improve the matching algorithm after SIFT detects the feature point and reduce the number of false matching points.In feature detection,we focus on the parallel design of key module architectures in FPGA-based detection algorithms,including Gaussian filtering module,DOG scale space generation module,and extreme point detection module,etc.,focusing on parallelizing the Gaussian scale space and DOG scale space of the image Pipeline design improves the efficiency and speed of generating scale space.The traditional SIFT algorithm and the improved SIFT algorithm are simulated by MATLAB software.The results show that the improved algorithm has higher matching accuracy.In the parallel architecture design of the algorithm,the algorithm based on the FPGA platform design is simulated and verified in the Vivado2018 environment.The calculation time of the algorithm is in the millisecond level,which can meet the real-time requirements and can be used for specific project implementation.