Ship Detection In Optical Remote Sensing Image Based On FPGA

With the development of remote sensing technology,using FPGA(Field Programmable Gate Array)as the core of the hardware platform is a research direction to realize real-time processing on the satellite.As a typical application of real-time processing on the satellite,the development of real-time detection technology for ship targets in optical remote sensing images is of great significance for China’s application in protecting marine rights,maritime search and rescue,and maritime traffic control.In order to design a ship detection system with good detection efficiency and easy to implement,it is necessary to analyze and research the existing methods,design an efficient detection method,and design the module from the perspective of FPGA hardware development.To provide theoretical basis and technical basis for designing ship detection methods,this paper firstly studies the key technologies of ship detection,analyzes the various aspects of ship detection,summarizes the difficulties,studies the characteristics and key points of each method.Based on the research of key technologies,this paper proposes a ship detection method based on visual saliency and multi-feature synthesis.The visual attention mechanism is introduced to calculate the saliency of the image,and the saliency map is updated by the method of adaptive dynamic stretching.After the segmentation,the target candidate region is obtained.Then,the voting classifier is used to comprehensively judge the target feature to complete the classification of the target.The experiment proves that the method has good detection effect and has certain robustness.In this paper,the hardware design of FPGA are proposed for the proposed detection method.In the top-down development mode,the ship detection system is divided into three modules for design,and then is subdivided into 7 sub-modules,each sub-module is combined in the form of pipeline.The design of the connected domain fast labeling module is compared with the existing research.The results show that the design of this paper effectively reduces the running time and resource consumption.The simulation and experiment of each module and the whole system are carried out.The results show that the design scheme of this paper fully exploits FPGA’s advantages of hardware acceleration to meet the requirements of engineering application under the premise of ensuring the detection accuracy.