Design Of USM Drive For Adjusting Speed

With the characteristics and advantages of ultrasonic motor(USM)constantly recognized and explored by researchers,more and more USM appear in military and private machinery and electronic products.Due to its advantages of miniaturization,no electromagnetic interference and low speed and high torque,it has gradually replaced the traditional electromagnetic motor in mechanical arm,digital camera and other industries.However,due to the particularity of its working mechanism,it is difficult to design its drive and control circuit.At present,the number of related chip products in the market is very small.Therefore,small and efficient integrated drive and control system of ultrasonic motor has become an urgent demand at home and abroad.The main work of this thesis is to realize the integration of the drive and control of the ultrasonic motor.The electrical model of ultrasonic motor is studied,and the SRFF equivalent circuit model including stator,rotor,friction layer and positive pressure of ultrasonic motor is derived innovatively.The optimized parameters of LLCC resonant network are derived and designed,which can effectively reduce the total harmonic distortion of motor driving signal.In order to realize the miniaturization of the motor drive system,the USM miniaturized single chip integrated drive chip is designed.Using PID control principle,the digital control circuit of ultrasonic motor is realized on FPGA.In this thesis,a large number of literature and the company’s product manuals are consulted,the dynamic equation of ultrasonic motor is rewritten into the circuit equation,and the srff equivalent circuit model of ultrasonic motor is derived.The new USM model can express more accurate motor load characteristics,which is convenient for control algorithm research.Based on the theoretical analysis of LLCC resonant circuit,the formula of waveform distortion rate of motor driving voltage is derived,and the resonant circuit design is optimized.The architecture of the driver chip adopts Boost converter + H half-bridge rectifier circuit.The principle and design process of EA error amplifier and H half bridge level displacement circuit are introduced in detail,and the layout and packaging design of the driver chip are completed.A Hall sensor is used to sample the motor speed,and a matching speed sampling and error quantization circuit is innovatively designed accordingly.Combining the principle of PID control,the control signal generation circuit was innovatively designed,and finally it was successfully realized on FPGA.Finally,based on the 0.18μm BCD process,this thesis completed the drawing and tapeout test of the driver chip,as well as the construction of the motor drive control system.The test results show that the designed ultrasonic motor speed adjustable system works normally and each index meets the requirements.The key signals inside the drive chip work normally,and Boost outputs a stable voltage of 40 V.The digital control signal controls the H half-bridge circuit to output two-phase drive signals with a certain phase difference.The LLCC resonant network outputs a sinusoidal signal with low distortion rate to drive the motor.The work of this thesis paves the way for the future digital analog hybrid single chip integration.