Research Of DPR-FPGA Resource Placement Based On Adaptive Genetic Algorithm

Field Programmable Gate Array(FPGA),as a highly integrated semi-custom dedicated integrated circuit chip,has the advantages of high parallelism,high speed,low power consumption and low cost,which is widely used accelerate in large data centers and cloud service platforms.With the emergence of Dynamic Partial Reconfigurable(DPR)FPGAs(DPR-FPGA),the flexibility and development potential of FPGAs have been further improved,but they have also brought greater challenges to the on-chip resource placement and complex designs.Complex design constraints need to be matched with more efficient placement algorithms to get good placement results.Based on the above problems,this paper summarizes and analyzes the multi-tasks DPR-FPGA resource placement process,and subdivides it into the single-chip deployable multi-tasks problem and the multi-tasks problem requiring multiple deployments,then proposes solutions to the two sub-problems respectively,and designs and realizes the multi-tasks adaptive placement scheme of DPRFPGA.The research contents are as follows:(1)In this paper,we abstract the single-time deployable multi-task problem into a twodimensional resource mapping problem based on plane,propose an adaptive resource layout algorithm,and improve the adaptive genetic algorithm(AGA).An indirect coding method based on handle-task correlation is designed to realize the mapping between the twodimensional placement solution space and the coding space;the handle-attribute intersection and chromosome reverse sequence mutation operations are optimized to enhance the global search ability of the adaptive placement algorithm,and it can get better results of twodimensional placement in a shorter time.Comprehensively considering the two evaluation indicators of resource utilization and maximum available free area,a fitness function for multi-objective optimization is designed,an adaptive heuristic placement algorithm is implemented,and the efficiency of FPGA resource placement is improved.(2)On the basis of the above work,in order to further solve the multi-tasks problem that requires multiple deployment,it is abstracted as a three-dimensional configuration planning problem based on time sequence,and an off-line 3D placement device based on task dependency is proposed.By analyzing the data dependency relationship between multi-tasks,dividing the placement stage of the tasks,combining the partial configuration layering principle in the dynamic partial reconfiguration technology,the partial configuration timing of the multi-tasks placement is obtained,and the design has the overall planning ability Offline 3D placement.(3)Combining the AGA-based adaptive resource placement algorithm with the taskdependent off-line 3D placement device,this paper designs a DPR-FPGA multi-tasks adaptive placement scheme,which combines the advantages of heuristic placement and three-dimensional global planning,the spatial reuse of resources further improves the resource balance problem of multi-tasks placement.Finally,using TGFF generates task sequences for contrast experiment.Comparing the AGAbased adaptive resource placement algorithm with other two-dimensional placement algorithms,the results show that the algorithm can effectively avoid the prematurity problem,quickly get the optimal placement solution,and effectively improve the resource utilization rate to 69.1%,and increase the maximum available blank space to 40.6% of chip resources.In addition,the algorithm has strong robustness.At the same time,the DPR-FPGA adaptive placement scheme is analyzed experimentally.The results show that the scheme shares the placement time consumption in the development and design process,reduces part of the configuration waiting time,alleviates the redundant occupation of resources,and effectively solve DPR-FPGA multi-tasks resource placement problem.