Design Of 6～8GHz 7 Bit Phase Shifter Based On Soi Cmos Technology

The wide application of digitally controlled phase shifters in satellite systems and global GPS navigation and positioning systems plays an extremely important role in the application of radar systems and multi-beam antennas.The phase shifter is a key part of the radar’s transceiver circuit.It can change the signal phase by changing the signal phase.The phased array radar is composed of a large number of transceiver circuit components,and the digital phase shifter is a supplementary part of the response of the transceiver component.How to reduce the area and cost of the digital phase shifter does not affect the performance of the radar system,which is the significance of this research.Afterwards,various numerical control phase shifting of phase shifters have been widely used in automotive GPS navigation and satellite systems,especially in phased array radars and multibeam antennas.The phase shifter controls the change of the direction of the wave speed by changing the phase of the signal,which is a key component of the phased array radar transceiver component.There are thousands of transceiver components in each phased array radar,and each transceiver component requires a responsive digital phase shifter,How to reduce the cost and volume of the phase shifter without affecting the performance of the phased radar makes the research of this topic very meaningful.how it works.Based on the 0.28μm SOI CMOS process,the paper designs a 7-bit digital phase shifter in the 6～8GHz band.The 180° phase shifting unit circuit design uses a high/low pass filtered phase shifting structure that achieves large phase shifts over a wide range of frequencies.The 90°,45°,22.5°,11.25°,5.625° phase shifters use a bandpass/lowpass filter phase shifting structure that achieves phase shift in the wideband range while having lower capacitance and inductance values,The high pass/low pass filtered phase shifting structure has a lower insertion loss.The 2.8125°phase shifting unit uses a simple capacitive-inductor switching network structure that reduces phase insertion while reducing insertion loss.In the design and post-simulation phases of the layout,layout and post-simulation optimization are separately designed for each phase-shifting unit,and finally all phase-shifting unit layouts are cascaded and optimized.The paper completed the circuit design,pre-simulation,layout design and post-simulation.The layout size is1.57mm×l.3mm.After 2.5V power supply voltage,TT process angle and temperature range-40～85℃,the simulation results are obtained.To: the overall insertion loss ≤ 10.86 dB,phase shift error(RMS)≤ 5.50 °,amplitude error(RMS)≤ 0.6dB,input 1dB compression point ≥ 10.9dBm,input matching ≤-10.35 dB,output matching ≤-10.07 dB.The 6～8GHz 7bit digital phase shifter designed by the thesis meets the design specifications and can be applied to the phased array radar system.