Study On Time-To-Digital Conversion Based On Field Programmable Gate Array

TDC(time-to-digital Converters)technology is widely used in nuclear physics experiments,aerospace,nuclear medical imaging,automated test instruments and laser ranging.The research of high-precision TDC based on FPGA is based on the high-precision ultrasonic flowmeter project cooperated with Ningxia Rongshenwei Automatic Instrument Company and combined with its own research foundation.Ultrasonic flowmeter is used to detect the flow through TDC to detect the time interval of ultrasonic signals.Therefore,TDC is the key to accurately measure the flow.In practice,the resolution and linearity of TDC in ultrasonic flowmeter have certain influence on the accuracy of ultrasonic flowmeter,so the realization of TDC with high precision is of vital significance to improve the accuracy of ultrasonic flowmeter.The thesis focuses on the measurement principle of high precision time digital conversion system and its FPGA implementation method.Firstly,the internal structure of FPGA chip was studied,and the feasibility of using FPGA to design TDC was studied to explore different methods to realize TDC and their respective advantages and disadvantages.Then,according to the above analysis,a high-precision TDC is implemented in FPGA.Finally,the performance of the TDC is compared and analyzed by using the code density method on the ultrasonic flowmeter platform.The main work of this paper is as follows:(1)The basic buffer delay chain TDC is built in FPGA.In the implementation process,in order to improve the delay consistency of the delay chain constructed by the buffer,the position of the buffer in the TDC in the FPGA was adjusted by using the method of manual layout and wiring to make them neatly arranged.And analyzed the delay time consistency of the delay unit in the delay chain in Chip Planner according to its routing situation.(2)By analyzing the influence of constructing delay chains with different delay units and organizing delay chains with different methods on TDC performance,Verilog HDL hardware programming language was used to realize a vernier ring oscillator structure TDC based on adder carry chain,namely high precision TDC.In this TDC,the delay chain formed by two adders carry chains with delay difference in the fine count module is organized by using the cursor method,which can effectively reduce the influence of different spacing between the basic logic units of FPGA and inconsistent delay time of carry chain on system linearity.(3)On the established ultrasonic flowmeter test platform,the basic principle of code densitytest method is used to test the realized TDC delay chain,that is,the delay time of delay unit in the delay chain is proportional to the number of pulses falling on it,and its resolution,linearity and precision performance are analyzed.The test results show that the delay chain constructed by the high precision TDC based on the carry chain of adder achieves a resolution of 39ps on Cyclone Ⅳ E EP4CE6E22C8 FPGA,and the differential and integral nonlinear are(-0.28,0.33)LSB and(-2,0.62)LSB respectively,with an accuracy of 31ps.To sum up,the high precision TDC based on FPGA realized in this paper has good measurement resolution,high nonlinearity and precision performance,and has good application value for the high precision ultrasonic flowmeter.