| With the advancement of science and technology and the development of the instrument industry,high-speed programmable pulse signal sources have been widely used in military,industrial,medical and other filed.However,the level of the pulse signal required for the test is different in each field.In order to meet the general applicability of pulse signal source,it is imperative to explore a high-speed pulse signal source with the advantages of low phase noise,low jitter and precise adjustment of time delay,signal pulse width and high-low level value.Firstly,this dissertation proposes the research of world wide in pulse signal source.Then,the pulse signal source are decomposed into pulse signal clock source,pulse pattern data generating unit,pulse delay generating unit,and pulse signal level conditioning unit for analysis.In the part of analyzing pulse clock source,the working principle and basic structure of its key component charge pump phase-locked loop are analyzed,and its mathematical model is studied in depth,characteristics are analyzed through the mathematical model.A high-resolution,low-phase-noise pulse clock source scheme was proposed.The key technologies involved in the scheme,such as high frequency resolution,phase noise,jitter,integer boundary spurious,and fractional spurious,were analyzed and discussed in detail.Also,the feasibility of the scheme was proved.The existing linear level conditioning methods composed of op amps are limited by the slew rate and bandwidth of the op amps and are not suitable for high-speed pulse signal sources.The dissertation proposes two solutions based on large bandwidth and common differential mode adjustment.A level adjustment method for rapid signal transition and a large amplitude signal level adjustment method based on high and low level adjustments.The dissertation completed its hardware circuit design according to the relevant scheme.The hardware circuit mainly includes a decimal phase locked loop circuit,a narrowband phase locked loop filter circuit,a pulse code data conversion circuit,a delay modulation circuit,a common differential mode adjustment circuit,and high and low levels.Regulating circuit and RS485 communication circuit.Finally,the system was built and its key technical indicators such as phase noise and jitter,inter-channel delay,pulse pattern data,output interface level and transition time were tested and analyzed,which proved the feasibility of the entire design scheme. |