| Defects are inevitable in the photolithography process,and mainly include various defects introduced by the physical properties of photolithography materials and process factors,as well as imaging defects introduced by the incomplete matching of the actual design and manufacturing as the feature size continues to shrink.Restricting the development of chip manufacturing to a certain extent.At present,as integrated circuits enter the sub-nanometer technology node,the smallest defects that can be identified are getting more and more refined,which brings challenges to optical and electron beam defect detection systems.Defects are one of the main influencing factors of chip yield.The defects involved in this study include solid residue,collapse,and water pollution.These defects feature a large span and have high requirements on equipment identification algorithms.And as the process control becomes more and more critical,the identification and location of defects is particularly important.Under the severe conditions of a small defect dataset,divided batches of electron beam measurements,and large differences in features,this research has conducted feasibility analysis and investigations,and after making targeted modifications to the original neural network,the advantages of the improved neural network in the recognition task of this subject are verified by comparison.Finally,a fine-tuning neural network based on transfer learning and pre-training is constructed suitable for the identification task of this subject,and the influence of different optimizers on the effect of defect training is studied,and then the optimization of the optimizer is realized.This dissertation uses two fine-tuned neural network models to realize the autonomous recognition and classification of defects.The recognition accuracy rates are 95.0% and 91.1% respectively.The influence of the complexity of the two network structures on the recognition accuracy is analyzed at the same time.This dissertation has also established a visual display and location algorithm model of defects.By using the visualize intermediate activations method of the neural network,the network extracts the deep-level features of the defect image is shown layer by layer,and make decision on the analysis of defect features recognition process.The Gradient-weighted Activation Mapping technology is used to generate defect heat maps,which realizes the positioning of defects and the debugging of the recognition model.This dissertation also successfully extended the method of defect image recognition and visualization to the field of automatic recognition of integrated circuit layout.Through the neural network transfer learning of 6 kinds of special patterns of lithography process,the recognition accuracy rate is as high as 97.0%.This dissertation fully verified the engineering application value of transfer learning in the field of integrated circuit lithography defect recognition,and improved the friendliness of defect display.Although the samples used for training are not in the same batch,the number is limited,and the feature span is large,after targeted tuning and improvement,the deployed model shows good defect prediction and location capabilities. |