| In the modern computer architecture,the performance of I/O devices is more and more concerned.The emergence of I/O virtualization technology makes the utilization and performance of I/O devices improve rapidly.The implementation of hardware assisted I/O virtualization technology makes the overall performance of the system a big step forward.Traditional I/O virtualization will make the system switch context many times through software intervention,which is easy to form a communication bottleneck,leading to the waste of CPU and a large number of memory resources.Based on hardware assisted I/O virtualization technology,it overcomes the shortcomings of traditional I/O virtualization through software intervention,and realizes I/O virtualization through special hardware modules,which effectively reduces the pressure of CPU.Firstly,this paper studies the architecture of VT-d,SMMU and IOMMU and the principle of DMA remapping,and introduces the interrupt remapping technology of VT-d.Then,the DMA remapping technology of a domestic processor is analyzed and studied,and the design scheme of DMA remapping device based on four level address substitution is proposed.The processing flow of DMA remapping is described,and the implementation details of DMA remapping are analyzed from two aspects of hardware substitution and software substitution.Finally,according to VT-d technology,a detailed design scheme of interrupt remapping based on a domestic processor is proposed,and then the interrupt remapping is realized according to the design scheme.The purpose of interrupt remapping is to remap the interrupt requests,so that multiple interrupt requests can access a small amount of physical address space.This design is mainly realized by two level address substitution,and uses TLB and Cache technology to speed up the address substitution in the process of address substitution,which reduces the frequency of accessing memory and speeds up the response of interrupt remapping components;in the process of accessing memory,ECC check algorithm is introduced to improve the reliability and security of components;when there are multiple local interrupt requests generated,it is easy to implement The request can be sent out by fair rotation arbitration algorithm to enhance the stability of the component.Finally,the paper tests the implementation of interrupt remapping technology to ensure the correctness of the design function and logic.The paper mainly uses static check and dynamic simulation to verify each module and subsystem.EDA tool is used to check the semantics and specification of RTL code,and then the normal address substitution and abnormal address substitution are tested in the direction.Then,the missing items,refresh and filling in TLB and cache are randomly tested.According to the interrupt remapping scheme proposed in this paper,all functions are basically realized;Compared with the traditional software implementation,the speed has been improved by an order of magnitude;Through TLB and cache technology,the speed of hardware replacement is greatly improved,and the CPU overhead is greatly reduced. |