Research On High Dynamic Image Processing System Based On SoC FPGA

High dynamic range image(HDRI)is more and more widely used in video image processing systems.In the fields of machine vision,video surveillance,and autonomous driving,high dynamic range images have good application value and application prospects.This dissertation designs a high dynamic image real-time processing system based on SoC FPGA.First of all,for the enhanced display of high dynamic images,this dissertation proposes a two-level histogram equalization algorithm.Performing conventional histogram statistics on ultra-high dynamic images requires very large storage resources and computing resources,and it is difficult to realize real-time processing on embedded processors,and machine vision applications have high requirements for the real-time performance of the system.This dissertation improves on this problem and designs a two-level histogram equalization algorithm,which greatly reduces the memory usage,and the processing effect is close to the conventional histogram equalization,so that it can be used in high-dynamic image processing systems.Secondly,aiming at the problem of high dynamic image acquisition and transmission,this dissertation designs and implements a high dynamic image acquisition and transmission circuit,so that the system supports real-time acquisition and transmission of high dynamic images with a maximum depth of 20 bits.The circuit includes the image sensor circuit,the image serial circuit and the deserialization circuit.The image data collected by the high dynamic image sensor is converted into the FPD-Link Ⅲ signal through the serializer circuit from the MIPI CSI-2 signal,video transmission and two-way communication are carried out through a coaxial cable,and then the MIPI CSI-2 is output through the deserialization circuit.The signal is sent to the SoC FPGA chip for image data reception and high dynamic image enhancement processing,which solves the problems of short data transmission interface distance and complex lines,and can better meet the needs of the actual application of the system.Finally,based on the Zynq SoC FPGA chip,this dissertation implements the software design nd the Verilog-based programmable logic design of the high dynamic image real-time processing system,and implements the system chip register configuration,image receiving and processing,high dynamic image enhancement,and image data output modules.The test and trial results show that the system can correctly realize the real-time acquisition and transmission of high dynamic images and the processing of high dynamic image enhancement.The processing results can be directly observed on the display through the HDMI interface,and the image data can be transmitted to the PC for real-time display and storage through the gigabit network port,which meets the design requirements of the system and better meets the actual application requirements.