Research On Wafer Map Pattern Recognition And Classification Method Based On Transfer Learning

Yield rate is one of the most important production indicators in the wafer map manufacturing industry.Some classic defect types in wafer testing present basic patterns such as circles,rings,and scribe lines in the wafer map.This research aims at the problem of fast and efficient classification of wafer map defect patterns,but the actual wafer map data set may have serious shortages of certain types of data.Therefore,this paper uses a combination of deep convolutional neural network(DCNN)and transfer learning to achieve rapid and effective classification of 9 types of defect patterns in wafer maps.The main research work is as follows:(1)Aiming at the characteristics that handwritten numbers are basically composed of some basic patterns such as curves and circles,this paper uses transfer learning methods to transfer knowledge in the field of handwritten digital image classification to the field of wafer map defect pattern classification.Perform pre-processing operations on the size of the original wafer map and the original handwritten title digital image,and use the nearest neighbor interpolation method to convert the two to a size of 224 × 224 to ensure the characteristics of the wafer map and avoid new pixel values.In the image,the handwritten digital image appears jagged,which is visually more similar to the wafer map.The pixel value of the original wafer image is converted into a gray image according to the gray conversion formula.And before modeling,the pre-processed wafer map data and handwritten digital image data are divided into two sets of five-fold cross-validation data sets according to the data set division requirements of the five-fold cross-validation experiment.(2)Drawing lessons from the structure of the Le Net-5 network feature learning part commonly used for handwritten digital image classification,constructing two DCNN classification models,and combining the transfer learning framework proposed in this paper,and further proposing two methods: CP-DCNNs and Cf-CP-DCNNs.The results of the five-fold cross-validation experiment are used to judge the effects of the above two classification methods.The experimental results show that the highest test accuracy rates of the two proposed methods in 5 experiments are 97.88% and 98.13%,respectively.Then,by comparing the results of the wafer map defect pattern classification with the same structure of the non-transfer learning method,the wafer map defect pattern classification methods CP-DCNNs and Cf-CP-DCNNs proposed in this paper are compared with the same non-transferable DCNN classification model.The transfer learning method has advantages in classification accuracy and stability.(3)Aiming at the problem that the above method can further improve the data classification results of some wafer map defect patterns,the residual block is used to optimize the DCNN model proposed in this paper,and the residual block is used to replace the former part of the maximum pooling layer of the original DCNN network.Retain the largest pooling layer of DCNN to achieve faster and effective classification of wafer map defect pattern data.Then combined with the transfer learning framework proposed in this paper,a method for classification of wafer map defect patterns based on residual block optimization DCNN and transfer learning is proposed.Based on the residual block optimization DCNN and transfer learning,the highest test accuracy of the wafer map defect pattern classification method in the five-fold crossover experiment is 98.92% and98.80%,respectively.Moreover,comparing the results of the CP-DCNNs and Cf-CP-DCNNs methods,the optimized method can better classify wafer map with more defect patterns.Finally,the optimized method in this article is compared with the three transfer learning methods based on Googlenet or Resnet50 or Densenet.The overall fine-tuning time of the optimized method in this article is 1/13,1/19,1/32 of the above three common transfer learning methods,respectively.Fine-tuning time on a single wafer map the optimization method in this article is 0.0774 seconds,1.0365 seconds,and 1.7720 seconds faster than the three commonly used transfer learning methods,respectively.