| In recent years,with the development of the Internet of Things and intelligent voice technologies,voice interaction has gradually become the mainstream human-computer interaction method.In order to meet the speech recognition interaction of always-on and real-time response,the always-on processing of the speech signal needs to be deployed on small smart terminal devices with very limited energy.The addition of a low-power speech recognition wake-up module can significantly reduce the power consumption of the always-on speech recognition system.Speech feature extraction is an indispensable step in the entire speech recognition process,and Mel Frequency Cepstral Coefficient(MFCC)is the most commonly used feature.In the conventional digital domain research works,the complete MFCC feature extraction including the analog-to-digital converter(ADC)is the power consumption bottleneck of the entire always-on speech wake-up system.Low-power speech MFCC feature extraction can greatly improve the working time of the always-on speech recognition system.In conventional digital domain research works,it is inevitable to use high-energy-consuming ADC to convert analog speech signals into digital signals.At the same time,a time-consuming fast Fourier transform(FFT)is required for frequency domain analysis.In order to reduce the power consumption and hardware implementation cost of speech MFCC feature extraction,the following works have been completed in this thesis:(1)The low-power speech MFCC feature extraction in mixed-signal domain is adopted,where speech energy distribution is extracted in the analog domain and the calculation of speech MFCC feature parameters is completed in the digital domain.The time-consuming FFT transformation is eliminated,while the processing cost of the ADC is reduced.The design and implementation of the low-power speech MFCC feature extraction architecture in mixed-signal domain are optimized with hardware as the center.The flexibility of the overall architecture is optimized,and the analog circuits with low power consumption,low interface cost,and easy-to-adjust are adopted,which can be implemented on a large scale.The analog path of the low-power speech MFCC feature extraction in mixed-signal domain is completely implemented,which reduces the power consumption and implementation cost of the speech MFCC feature extraction without affecting performance.(2)The analog front-end chip of a single-channel mixed-signal domain speech MFCC feature extraction is designed and taped out.The single-channel chip based on180 nm process has the adjustable frequency and gain that can be adjusted to run on any channel with a center frequency below 4k Hz,and the number of channels can be configured flexibly.The power consumption of the speech MFCC feature extraction in mixed-signal domain based on the single-channel chip is 74μW,and the recognition accuracy can reach 97.98%.Compared with the conventional research works in the digital domain,it can achieve the similar recognition performance and save 89% of the power consumption.The feature extraction of speech signals with different noises has similar noise robustness compared with conventional digital domain speech MFCC features when the signal-to-noise ratio is 10 d B and above.(3)Based on the results of the single-channel chip,a more advanced 65 nm process for multi-channel expansion is used.The analog front-end chip of a full-channel mixed-signal domain speech MFCC feature extraction is designed and taped out.In the post-simulation results of the expanded full-channel chip,the recognition accuracy reaches 98.38%,and the power consumption is 30.87μW,which proves that the recognition performance of the full-channel chip can be compared with conventional speech MFCC feature extraction and can save 95.39% of the power consumption.The actual test results of the unit circuits can make the recognition accuracy of the speech MFCC feature reach 95.96%.The total test power consumption of the chip is 31.57μW,achieving a power saving of 95.3%. |