| A wireless sensor network is a system which is composed of scattered sensors.It is used to detect and record the temperature,humidity,pollution grade,wind direction in the surrounding environment,and deliver the data of these tests to the central area in order to processing data.It has a wide range of applications in smart home appliances,intelligent agriculture,and military.High quality frequency synthesizer is one of the key circuits in wireless sensor network.It has an important influence on parameter acquisition and perception in sensor network.It meets the requirements of oscillation frequency range and phase noise of frequency synthesizer output signal and reduces power consumption as much as possible.The research goal of this thesis is to design a monolithic integrated voltage-controlled oscillator for frequency synthesizer in wireless sensor network.The frequency of its output signal is used as the output of frequency synthesizer.The main work and results of this design are as follows:1.The basis of deeply studying the characteristic parameters of quadrature VCO and the advantages and disadvantages of four main oscillators,the overall scheme design of monolithic integrated VCO circuit is completed.The quadrature VCO structure with low power consumption,low phase noise,high integration and output multiphase signal is used as the core circuit,and the variable capacitance of lower power consumption and phase noise accumulation MOS tube is selected as the frequency FM device in this design.The quantitative analysis of phase noise is completed based on linear time-invariant model and linear time-varying model.The design scheme of making phase noise less than-114.8d Bc/Hz is obtained.2.According to the design requirements,this area has completed the structural design and sub-circuit design of a monolithic integrated QVCO circuit,including main circuit,negative resistance circuit,filter circuit and buffer circuit.The main circuit consists of two resonant cavity VCOs with identical parallel coupling structures;the filter network is implemented by a RC filter circuit with lower phase noise and lower power consumption;the buffer structure uses a three-stage source differential coupling buffer,which can isolate the VCO signal from other circuits;and the tail current source is implemented by a cross-coupled MOS tube structure that can provide current bias and negative resistance.In order to reduce low power consumption,the optimized bias current is 3.0 m A.3.Circuit design and simulation verification of QVCO are completed.The results show that the operating voltage at 1.8 V and the tail current source provide bias current of 3.0 m A.The starting point of the output waveform is 15 ns,and the angle difference of the four-way oscillation signal is about 90 degree.4.The layout design and simulation verification of the QVCO circuit are completed.The results show that in 1.8 V operating voltage,the tail current source provides 2.8 m A bias current.The starting point of the output waveform is 26 ns,and the angle difference of the four-way oscillation signal is about 91 degree.The phase noise is-123.4 d Bc/Hz,the output frequency range is 3.351 GHz ~ 4.875 GHz.Base on the results,circuit design,layout design and simulation verification of a monolithic integrated VCO based on TSMC 0.18 μm CMOS technology are completed to meet the design requirements.The results of this thesis have engineering reference value for the optimization design of high performance monolithic integrated voltage controlled oscillation circuit. |