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Research And Design Of Key Technologies Of High-precision Sensor Analog Front End

Posted on:2022-02-07Degree:MasterType:Thesis
Country:ChinaCandidate:L Y WenFull Text:PDF
GTID:2518306602966729Subject:Master of Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of 5G communication,integrated circuit technology and wireless sensor network technology,analog front-end circuits with environmental sensing,data processing and biological sensing have received extensive attention and applications.The analog front-end circuit is the most direct data interface between the system and the outside world,used to realize the conversion between analog signal conditioning and digital signal.The performance of the analog front-end circuit directly affects the performance and life cycle of the entire SOC systemThis paper designs a high-precision analog front-end circuit for DC measurement(such as bridge sensors).Because in the DC measurement system,its input signal is usually a small amplitude signal with several hertz,so it needs high linearity Gain analog front-end circuit.The advanced analog front-end circuit designed in this article includes a low-noise and high-linearity Programmable gain amplifier and a discrete-time Sigma-Delta modulator(DT SDM).The programmable gain amplifier adopts the CCIA structure of chopper modulation and self-zeroing technology,which eliminates the 1/f noise in the opamp,and suppresses the ripple voltage generated at the output of the opamp due to the use of chopping modulation technology,and this structure It can prevent the large input DC common-mode voltage generated because the voltage of the bridge may exceed the power supply voltage of the analog front-end circuit.In addition,the use of chopping modulation technology in the DT Sigma Delta modulator effectively reduces the noise in the entire coil and improves the output accuracy of the ADC.Reasonably distribute the timing from input to quantized output of DT Sigma Delta modulator,which improves the stability of the overall loop.Based on the C1813 180 nm CMOS process,this paper has completed the circuit design and version diagram layout.The integrated noise of the front-end low-noise programmable gain amplifier at 0.5-4Hz is 131 n Vrms,which can tolerate an electrode offset of ±200 m V.When the 68 Hz sine signal is input and the sampling frequency is 500 KHz,an effective value of 20.6 bits is realized.The overall power of the analog front-end circuit is 635.4?W,of which the gain amplifier consumes 255.6?W.
Keywords/Search Tags:Analog Front End, Programmable gain amplifier, Chopper modulation, DC offset compensation loop, Modulator
PDF Full Text Request
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