Design And Implementation Of Large-capacity Spaceborne Switching Unit Based On Multiple Small-capacity FPGAs

With the development of technology and the continuous increase in user access requirements,the capacity required by the satellite Internet communication system is also rapidly increasing.A larger capacity switching unit is needed to meet the line-speed processing and transmission of higher-rate data.The on-chip storage resources of the aerospace-grade FPGA chip,which is configurable and widely used as the hardware platform of the on-board network switching unit,are quite limited and expensive.Moreover,in the past two years,foreign researchers have disclosed security vulnerabilities in the high-end series of FPGAs from Xilinx,the world’s largest FPGA supplier.This means that in the short term,it is of great practical significance to study how to use multiple low-end and small-capacity FPGAs to construct large-capacity onboard switching units.This thesis is based on the multi-channel large-capacity packet switching software project undertaken by the laboratory,and studies the design technology of the multi-port largecapacity Crossbar switching network based on multiple low-end and small-capacity FPGAs.First of all,we introduce the research background of the subject and the commonly used switching structure in the switching unit,and explain the different queuing modes and characteristics of the widely used Crossbar switching structure in this thesis.Secondly,we introduce the basic resources of FPGA and the resource management mechanism of the Crossbar switch structure in specific applications.With reference to the actual project,we analyze the resource occupation of the CICQ structure switch and different splitting methods in detail,and estimate the scale of the chip to build the CICQ structure exchange unit.Thirdly,we introduce the project function and performance requirements,give the overall design scheme of the CICQ structure switching unit realized by multiple FPGAs,and introduce the resource occupancy of the scheme.Fourthly,we elaborate on the functional module design and code implementation based on the CICQ exchange scheme.Finally,we perform functional simulation and board-level testing of the completed switching unit design.The simulation analyzes in detail the technical indicators such as switching capacity,delay,and verticality.The board-level test verified the function and performance of the solution and confirmed that the switching unit satisfies the pre-design requirements of this project.We propose three innovations in this thesis.First,we explored the law of resource requirements of different splitting methods when a typical Crossbar structure is implemented jointly by multiple FPGAs.Through analysis and comparison,we choose the independent implementation of the Crossbar cross network to split the Crossbar structure,and then we calculated the maximum scale of using XC5VFX130 T FPGA chips to build a switching unit.Second,we design and implement input and output processing modules of different rates and types of interfaces,and complete the identification and extraction of dedicated data frames under LVDS and 2711 interfaces.Third,a dedicated co-simulation environment has been established,and technical indicators such as switching capacity,delay,jitter,etc.of the switching unit are analyzed in detail,and the system simulation verification of the overall design is completed.