Design And Simulation Of SOI-Like LDMOS Device

With the development of power semiconductor devices into the deep submicron era,the traditional bulk silicon materials have approached their physical limits.The emergence of SOI(Silicon on Insulator)has improved the deficiencies of bulk silicon materials and is compatible with bulk silicon processes.The introduction of the buried oxide layer in the SOI LDMOS device realizes full dielectric isolation,so that the device has the advantages of anti-radiation and low power consumption.However,the buried oxide layer can also cause its own self-heating effect and total ionization dose,which limits the further development of the device.In view of this,this paper studies a kind of SOI LDMOS device structure.By selecting other structures to replace the buried oxygen layer,we can not only ensure the advantages of SOI LDMOS,but also improve the performance of the device and broaden the application field of the device.First,this paper studied a kind of SOI LDMOS(SL LDMOS)device structure based on the research on the working principle of traditional SOI LDMOS devices.This structure replaces the buried oxygen layer in SOI LDMOS devices with P~+N mutation junction,and the highly doped P-type layer is used to deplete the N-type layer before the device is turned on,so as to achieve the effect of a similar SOI LDMOS device.The N-type layer is made of 4H-SiC material.The wide band gap and high thermal conductivity of this material can ensure the anti irradiation performancer of the SL LDMOS device,and the SHE of SOI LDMOS devices can also be improved to improve the performance of devices.Comparing the proposed device with SOI LDMOS device,the results show that single event burnout(SEB)does not occur in the device when LET=0.5pC/?m.When the total dose is greater than 860Krad(Si),the breakdown voltage of SOI LDMOS device is lower than that of SL LDMOS.In the self heating effect(SHE),The lattice temperature rise of SL LDMOS devices is not obvious.Secondly,this paper improves the SL LDMOS device,forms a high concentration SiC layer in the SiC layer below the drain end by ion implantation,and forms the SLN LDMOS device.The addition of SiC buried layer can adjust the electric field in the drift region,by changing the breakdown position of the device,the withstand voltage of the device is improved.The simulation results show that compared with the SL LDMOS device,the breakdown voltage is increased by about 35.4%,the on resistance is reduced by about 5.7%,and the basic performance of the device is improved.The burnout threshold of the device is LET=0.93pC/?m,V_d=222V,which has good anti SEB performance.The total ionization dose(TID)will not affect the breakdown voltage of the device.The SLN LDMOS lattice temperature rises only 10%in the SHE.It is much lower than SOI LDMOS devices(89.3%).The final results show that the device structure studied in this paper has excellent anti SEB performance,and the improved TID and SHE of SOI LDMOS devices are suitable for use in harsh environments such as high temperature,high pressure and irradiation.