A Hardware Accelerator For Image Vignetting Correction Algorithm

Vignetting is an undesirable effect when taking pictures.This effect is based on the radial fall off of brightness away from the optical center of the image,especially in scenes such as dark light shooting.In order to solve the video vignetting problem which night light imaging team encountered,this paper analyzes several existing image vignetting correction algorithms in the academic circles.The algorithm which based on a single input image from a non-predetermined camera is more suitable for the project application.However,due to the high complexity of the algorithm,it is not possible to meet the throughput demand of video on the embedded platform,so the hardware accelerator of image vignetting correction algorithm is designed in this paper.This paper focuses on the vignetting correction algorithm based on the minimization of log-entropy,and designs the overall framework of the hardware accelerator,then described the design and implementation of all modules in detail.In order to meet the precision requirements of the algorithm and reduce the hardware resources,this paper designs CORDIC modules which expand the convergence domain to calculate ln and division,and the correction module,histogram calculation module,parameter verification module,controller module and so on.Accelerator workflow is mainly divided into two stages,gain parameter iteration and image brightness correction.In order to meet the throughput and delay requirements in the design indicator.In gain parameter iteration stage,the image is sampled to reduce the running time,the sampling ratio is 64:1.In the image brightness correction stage,hardware accelerator uses 16 correction modules to correct image parallelly.Based on three software platforms,this paper also conducts detailed tests on the hardware accelerator.The test results show that the accelerator has excellent correction performance,the average PSNR is 5.491 higher than vignetting image,SSIM is 0.2935 higher than vignetting image.The throughput of accelerator is 110 frames per second for 1920x1080 video,which is 7 times the indicator.The entire board consumes 4.758 W,about 40% of the embedded platform.The hardware resources used are relatively small,with less than one-fifth of the resources used except LUT resources,which consume about one-half of the board’s resources.This accelerator can be considered to meet the design indicators.