Research And Design Of Low-delay Half-bridge Driving Circuit

Power MOSFET is one of the most widely used power devices.Power MOSFET and its driving circuit are widely used in industrial robots,industrial control equipment,home appliances,UAV,new energy transportation and other fields.It has important research and application value to design a suitable gate drive circuit for power MOSFETs with different performances.In this project,a 100 V power MOSFET gate drive circuit based on 1?m BCD process.The circuit is based on half-bridge structure,which can be used in synchronous DC-DC switch,PWM motor driver and other application fields.Circuit design indicators: 1.The high-side and low-side channels are worked on 8 V-14 V;2.The input port is compatible with 3.3 V,5 V and 15 V TTL input logic signals;3.The typical signal delay is 27 ns;4.The output current capability is 1.4 A;5.The chip can work when the high-side floating ground HS slew rate(dv/dt)is less than 100 V/ns.In this thesis,the basic structure block diagram of the circuit is determined according to the requirements of chip index.Considering the requirements of low delay and dv/dt immunity of the circuit,based on the idea of the current subtractor,the traditional level shift circuit is improved.The level shift circuit used in this project has immunity of 100V/ns dv/dt,the transport delay is less than 7ns.Aiming at the problem of narrow pulse transmission,a narrow pulse transmission scheme is proposed.The limitation of the minimum pulse width is changed from the narrow pulse generation module and the level shift module to the D flip-flop and the logic gate.Taking the level shift module used in this design as an example,the narrow pulse transmission technology is adopted to reduce the narrowest pulse width that can be transmitted from 20 ns to 1 ns,and at the same time increase the maximum signal frequency that the level shift circuit can handle.This paper also analyzes and simulates the sub-module circuit used in the circuit.After verifying that the sub-module circuit meets the design requirements,the overall simulation of the chip is carried out.