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Mechanical Simulation Of CIS Interconnect Structure Under Temperature Cycling Conditions

Posted on:2024-03-07Degree:MasterType:Thesis
Country:ChinaCandidate:J GengFull Text:PDF
GTID:2530306914492394Subject:Master of Electronic Information (Professional Degree)
Abstract/Summary:PDF Full Text Request
With the development of electronic information technology and artificial intelligence,the demand for automotive electronics market has surged.Among them,CMOS image sensor(CIS)is one of the most widely used sensors.In order to meet the urgent demand for small packaging and high reliability of automotive image sensors,it is necessary to develop Waferlevel chip-scale packaging(WLCSP)technology using Through silicon via(TSV)to replace the existing Chips on Board(COB)method.CIS is connected to the substrate,and the signal is transmitted through the interconnection structure.The interconnection structure needs to withstand higher mechanical,thermal,electrical and other load densities,and the reliability requirements of the CIS device interconnection structure are getting higher and higher.Therefore,it is necessary to carry out mechanical simulation research on CIS interconnect structure under temperature cycling conditions.In this paper,the mechanical properties of three interconnection structures,the Redistribution layer(RDL),TSV,and solder joint,are studied by the thermal-mechanical coupling method.Firstly,the stress of the RDL structure is simulated,and the thickness of RDL,the thickness of Si,and the thickness of PA(Passivation)are changed to analyze their influence on the stress distribution of RDL.Secondly,four kinds of TSV structure models are established,and their influence on the stress of TSV structure is analyzed from different pad thicknesses,different TSV tilt angles,and different sizes of TSV and pad contact surface.Finally,the effects of different BGA arrangements and different solders on the stress distribution of solder joints under temperature cycling conditions were studied.The research shows that for the RDL structure:when the RDL is a layer of material,the stress is the smallest when the full Cu structure is used;when the thickness of Cu and Ni in the RDL two-layer material is similar,the stress is smaller.For the TSV structure,when the pad is in Oxide,the stress decreases with the increase of pad thickness.When the thickness of the pad exceeds the thickness of the oxide,the stress increases significantly and decreases with the increase in pad thickness.The TSV inclination angle has only a slight effect on the stress of the structure.When the bottom radius of TSV is 10μm,the stress is the smallest.When the TSV radius is 15μm and 20μm,the stress is less than the radius of 5μm and 25μm.For solder joints:reducing the spacing of solder joints helps to alleviate the problem of stress concentration.Adding auxiliary protection solder joints can alleviate the stress concentration of solder joints under temperature cycle conditions,and protect solder joints that undertake electrical functions.When the solder joint composition is SAC305,the maximum stress in the BGA array carrying electrical functions is 87.284 MPa.When the solder joint materials are Sn63Pb37 and Sn58Bi,the maximum stresses in this region are 98.979 MPa and 46.523 MPa,respectively.This study can provide a theoretical basis and technical basis for chip package size and optimization design.
Keywords/Search Tags:CIS, Finite element simulation, Interconnected structures, Stress, micro solder joint
PDF Full Text Request
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