Fast Solution Of The Space Motion Equation

As a dynamic equation to describe and study the rocket flight law and motion state parameters,the space motion equation plays an irreplaceable role in the launch and control of aircraft powered by rockets,such as launch vehicles and missiles.Because the rocket has the characteristics of many forces and complex flight characteristics during the near-earth launch and flight process,the equations describing its flight laws are also very complex.As a system of second-order ordinary differential equations,the space equation of motion has various options for solving the initial value problem according to the requirements of accuracy and solution speed.The number of values is huge,and the calculation speed of traditional software is slow,and it is difficult to meet the calculation and calibration of rocket design and launch data.Considering the current situation of complex operation,large number of iteration steps and huge number of initial values for solving the space motion equation,author designs a space motion equation fast solver.In the solution method of the initial value problem of high-order ordinary differential equations,the fourth-order Adams prediction-correction method with higher accuracy and faster calculation speed is selected,and the classical fourth-order Runge-Kutta method is selected as the auxiliary method to design the space motion equation fast solver.For the two different solution methods selected,the iterative structure is used to realize resource reuse,and the data path dynamic configuration technology is used to realize multiple operation states within the algorithm and data path switching between different algorithms.The clock domain technology realizes the highfrequency time-division multiplexing of the arithmetic unit,which effectively reduces the solver’s demand for Field Programmable Gate Array chip resources;at the same time,an efficient storage resource multiplexing technology is designed to reduce the data refresh frequency and control of the on-chip storage.The complexity of the logic provides more space for the main frequency optimization of the solver.The whole design adopts a pipeline structure,which has the capability of batch operation without increasing the delay of a single operation,which increases the throughput rate of the system and shows a higher solution speed in the solution of large batch initial value problems.This design is implemented on the domestic FPGA platform,and tests the function and performance of the fast solver through multiple sets of experimental data in this FPGA.In the experiment,batch operation tasks are used to test the performance of the fast solver designed in this article,and the accuracy and error of the software and hardware solution results are analyzed.Experiments show that the error of the solver’s calculation results is within a predetermined range,and at the same time,in the task of solving large-scale initial value problems,it shows a better acceleration effect than traditional software calculate.