| Heart rate change is closely related to heart disease and is an important indicator of people’s health in daily life and in motion.Wearable smart watches/bracelets can easily obtain heart rate values in real-time during exercise.Currently,wearable smart watches mainly use Photoplethysmography(PPG)to collect physiological signals and calculate heart rate values.However,Motion Artifacts(MAs)caused by movements of the user’s arm affect the performance of PPG-based HR tracking.MAs are typically caused by the movement of the sensor module relative to the skin.MAs can lead to significant errors in predicting heart rate values,so obtaining accurate heart rates in motion is of great significance.To solve the above problems,complex denoising algorithms have been introduced.However,with the improvement of detection accuracy and robustness,the complexity of the algorithms and training parameters also increase,significantly increasing the burden of computing and storage resources.Therefore,they are difficult to deploy on hardware platforms that require low energy consumption and real-time performance.Considering that PPG wearable devices should meet the needs of continuous monitoring for users,it is necessary to explore low power consumption of embedded systems to achieve a good balance between performance and power consumption.Based on the above issues,this work has designed a heart rate detection module with high accuracy and low power consumption based on PPG.The main work of this thesis is as follows:1.In terms of algorithm,this thesis designs a convolutional neural network heart rate detection model based on a single channel PPG,which has a higher accuracy than traditional signal processing methods;While ensuring accuracy,the network size is compressed to the maximum extent to reduce the amount of parameters and computation.2.In terms of hardware,this thesis has designed the hardware of a low complexity heart rate detection model based on convolutional neural networks,and introduced multiple low-power optimization designs,such as zero skipping,clock gating,and so on.Through collaborative research of algorithm design and hardware simulation,redundant computing and data handling in the module are reduced,thereby reducing module power consumption.3.Experiments and analysis were conducted on the algorithm and hardware proposed above,and construct a heart rate monitoring demonstration and verification system based on FPGA platform to verify and evaluate the proposed design.Finally,through experiments and analysis,it is found that the heart rate detection algorithm based on PPG neural network proposed in this paper has reached the average absolute error of 5.18 BPM on the Da Li A dataset.In addition,based on Xilinx’s Artix 7FPGA platform,resource and power analysis was conducted on this design,and the dynamic power consumption of the hardware module designed in this thesis is 810μW.The simulation results show that compared with existing heart rate detection algorithms,the algorithm proposed in this thesis shows higher accuracy in heart rate detection in the testing of public datasets,while meeting the low-power requirements of wearable devices,achieving high accuracy and low-power heart rate detection,and meeting the application of real-time heart rate monitoring in wearable smartwatches and bracelets. |