ZYNQ MPSOC Based High-speed Dedicated Load Data Logger Design And Implementation

Unmanned reconnaissance aircraft represent one of the most critical assets on the battlefield.Their primary mission is to collect strategic and tactical intelligence accurately and in real-time.In order to operate independently of environmental and geographical constraints,UAVs are typically equipped with a diverse range of imaging sensors and reconnaissance equipment.This equipment generates vast amounts of data,with varying formats,interfaces,and output data rates.As a result,the data recording devices used must be capable of handling different data collection types and transmission rates.This project focuses on the development of a high-speed data logging device,based on the "high-speed data logging device development task" of an aviation institute.Specifically,the research aims to design a Zynq MPSOC-based,specialized,multi-parameter,high-speed data logger.This logger will be capable of high-speed reception,caching,transmission,storage,readback,and real-time display of two Camera Link digital image signals from the optical detector,one ARINC429 bus input,and one control signal from the master control via RS422.Moreover,the dissertation also proposes a Zynq MPSOC-based,dedicated,multiparameter,high-speed data logger capable of receiving,caching,transmitting,storing,readback,and real-time display of two Camera Link digital image signals from the optical probe,one inertial guidance signal via ARINC429 bus,and one control signal from the master via RS422.The dissertation investigates several aspects related to the design and development of these data loggers.Firstly,the dissertation conducts an analysis of the functions and technical specifications of the data logger,followed by the overall system design of the data logger.It is determined that the data logger comprises a master control chip,data reception module,data cache module,data transmission module,data storage module,and peripheral configuration module of the master control chip.The Zynq（?）Ultra Scale+^TMMPSo C series xczu9eg-ffvb1156-2-i chip is selected as the main controller chip,and the data receiving,storage,transmission,and cache circuits are chosen and designed.Finally,the overall hardware design of the data logger system is completed as per the program specifications.Secondly,based on the hardware platform,the dissertation conducts the logic design and implementation of key modules.Using Verilog HDL hardware language,the logic implementation of three different bus data reception,caching,transmission,and readback functions in real-time is carried out.This primarily includes the ARINC429 bus control module,Camera Link bus control module,RS422 bus control module,DDR4 SDRAM multi-channel controller module,PS-PL transmission module,and optical fiber transmission module.Finally,the dissertation conducts functional and performance tests on the data logger.A test system is built,and the load simulator is connected to the data logger to determine its normal function.The output data of the load simulator is compared with the data received,stored,and read back by the data logger to check for consistency.After 6 hours of continuous testing,it is found that there is no error code for continuous reception,and the accuracy and reliability of the data logger’s function of receiving and storing multiparameter data is established.The data logger can receive data at a rate of 171MB/s and read back data at a rate of 260MB/s,meeting the design requirements.