Research On Parallel Optimization Of Image Corner Detection Algorithm For Feiteng Platform

Corner detection is a preparatory key step in digital image processing such as image matching,target recognition,and three-dimensional reconstruction.DSP is widely used in the field of image processing due to its fast response to computationally intensive algorithms.Feiteng(FT)M7002 is a domestic DSP with excellent performance.The adaptation of high-performance image processing algorithms for this platform is an urgent problem to be solved.Based on the FT-M7002 platform architecture and hardware characteristics,this paper conducts parallel optimization research on Harris and Shi-Tomasi corner detection algorithms,and implements an efficient and reliable corner detection algorithm library for Feiteng platform.The main work of this paper is as follows:(1)Harris and Shi-Tomasi corner detection algorithms for FT-M7002 platform are designed.By studying the principles and characteristics of the Harris and Shi-Tomasi corner detection algorithms,combined with the FT-M7002 computing architecture,kernel characteristics and its memory hierarchy,two corner detection algorithms oriented to the FT-M7002 architecture characteristics are designed,and the The hot spot test is carried out,and the optimization methods and optimization feasibility of the two corner detection algorithms are analyzed.(2)Using the embedded SIMD instructions of the FT-M7002 processor,the data-level parallelism in the corner detection algorithm was deeply excavated.Combined with the FT architecture,the parallel optimization of Harris and Shi-Tomasi algorithms is realized;the data type parallel conversion interface between character type and floating point type,integer type and short integer type is designed and implemented,which improves the performance of the two corner detection algorithms.Scalability and practicability: Using optimization methods such as tail loop processing and data block,it solves the problems that the tail loop part cannot be processed in parallel and the vector storage space is insufficient.(3)On the basis of the parallel optimization of Harris and Shi-Tomasi algorithms,the two algorithms are further optimized by using compilation options,DMA transfer and loop unrolling.By studying the underlying hardware features of Feiteng platform,such as the compilation tool chain,cache mechanism,DMA data transfer mechanism,and vector memory structure,the code is further optimized in the compilation stage by using the compilation optimization option;For continuous problems,the double buffering technology is used to realize the parallelism of data transmission and kernel calculation,which hides the time gap between data transmission and calculation.The loop unrolling optimization method is used to increase the number of instruction beats,which effectively improves the execution efficiency of the algorithm on the Feiteng platform.Under various image matrix scales,the optimized Harris and Shi-Tomasi corner detection algorithms are tested for correctness and performance improvement on the FT-M7002 platform.The experimental results show that the optimized overall performance of Harris corner detection algorithm is as follows: It is improved by1.542～1.764 times,and the overall performance of the optimized Shi-Tomasi corner detection algorithm is improved by 16.998～23.066 times,which fully verifies the correctness and effectiveness of the work in this paper.At the same time,compared with the TMS320C6678 platform,the FT-M7002 vector processor is more than 2times faster than the TMS320C6678 multi-core processor,which fully verifies the efficient computing advantage of the Feiteng platform.