Application And Implementation Of FPGA For Fractional-order Iterative Learning Control

Fractional-Order Iterative Learning Control(FO-ILC)is studied extensively not only because of its accurate description to the controlled system by virtue of fractional calculus,but also its simple structure and high speed in repetitive dynamic systems using iterative learning control.However,fractional calculus has lead to an increase of the complexity for the FO-ILC design.Also,a design method of the converntional microprocessor-based digital controller is not suitable for FO-ILC design due to its calculation speed and compatibility with high-speed and real-time environments could not be fully satisfied.It is worth nothing that Field Programmable Gate Array(Field Programmable Gate Array,FPGA)can effectively promote the calculation speed and overall operating speed in the controller design because of its unique parallel computing architecture.Therefore,it is a feasible to design the FO-ILC controller based on FPGA.Currently,most of pre-existing FO-ILC algorithms are designed in continuous time domain,which requires discretization in digital realization of the controller.Fractional calculus in conventional FO-ILC has increased the complexity of the algorithm,and discretization will further increase the complexity of the algorithm.Consequently,to avoid double discretization and implement in a simple structure for the FO-ILC algorithm,a new discrete FO-ILC law based discrete formula of fractional calculus is prposed in this paper.Furthermore,this paper designs the expression of the FO-ILC learning law into a matrix form and uses the LUTs in the FPGA architecture to store parameters and dynamically changing matrix coefficient data in advance with considering the characteristics of hardware calculations,avoiding power operations and division operations and improving the calculation speed and accuracy of the FO-ILC controller.In order to verify the proposed FO-ILC control method,an FPGA-based DC motor control scheme is used in this article.The logic circuit modules which are implemented in FPGA mainly include motor speed measurement display module,FO-ILC controller module and drive module.The FO-ILC controller module is divided into three modules:memory module,calculation module and control module.The memory module,calculation module and control module are used to store control parameters and motor input data,calculate motor input data and control the data flow of the entire controller module and the working status of each module,respectively.In order to improve the calculation speed of the controller and the completion speed of the iteration,the design realizes the independent iteration of each time point on the time axis.The motor speed display module is composed of two sub-modules: speed measurement and digital tube speed display.The drive module is mainly composed of a PWM module,which is used to generate PWM waves with different duty cycles to control the speed and direction of the motor rotor.In the FPGA verification with DC motor as the control object,the motor rotor reaches the desired output trajectory of rotating speed within less iterations,and the FPGA-based FO-ILC control DC motor design is realized.