Design Of FPGA Accelerator For Radar Emitter Recognition Based On Improved CNN

As one of the key links of radar countermeasures,radar radiation source identification is an important part of electronic reconnaissance.With the development of electronic science and technology and the increasingly complex electromagnetic environment,new types of radars have appeared one after another,and the complexity of radar signals has also greatly increased.The traditional recognition method based on the five-dimensional characteristic pulse word is no longer enough to effectively identify the type of radar in the modern complex environment.Therefore,various advanced techniques need to be studied to improve the ability to extract information from radar radiation source signals.The development of artificial intelligence algorithms and platform applications have brought new options to radar radiation source identification.With the development of digital technology,radar received signals can be converted into digital signals through A/D converters.Consider the complex electromagnetic environment and the variable radar modulation types.Combined with the research of convolutional neural network,this paper proposes and implements an integrated FPGA accelerator based on improved CNN for radar radiation source acquisition and identification.The accelerator uses a high-speed ADC to collect radar intermediate frequency signals,and uses an improved convolutional neural network built with a systolic array architecture for calculation and identification,which can realize the identification and classification of radar radiation sources in seven modulation modes.The comparative experiments show that the accelerator has the advantages of high recognition rate,convenient portability,strong acceleration performance and integration of acquisition and recognition,and is more suitable for the recognition and classification of radar signals in the electromagnetic environment.The main work of the paper is as follows:1.Analysis and modeling of radar radiation source signals,establish simulation and analysis of the time domain and frequency domain of radar radiation source signals of seven modulation types.2.Apply one-dimensional convolutional neural network to radar radiation source identification by analyzing typical CNN network model.The traditional one-dimensional CNN is not good for the recognition of low signal-to-noise ratio radiation sources.Therefore,the traditional one-dimensional CNN network is improved,an improved one-dimensional CNN algorithm with an attention mechanism is introduced,and the improved CNN based on the FPGA is completed.Design of a Radar Radiation Source Identification Accelerator.3.The high-speed acquisition,storage and transmission of radar radiation source signals are realized through the high-speed JESD204 B transmission protocol and the use of the highspeed PCIe serial bus.The improved CNN network is built on the FPGA by using the principle of systolic array,and then the integrated accelerator test platform of radar radiation source signal acquisition and identification is realized.The accelerator has the advantages of high modularity,easy development,and moderate bandwidth to achieve high throughput.Through comparison,it is found that the accelerator has a good recognition rate for radar radiation source signals in a low signal-to-noise ratio environment.The model is trained with a signal-to-noise ratio range of-10 d B～10d B,and tested with a larger signal-to-noise ratio range(-20 d B～10d B).In addition,when the signal-to-noise ratio is greater than-10 d B,the model recognition accuracy rate reaches 94.32%,and the average recognition rate of the signal-to-noise ratio in the range of-10 d B～0d B reaches 97.73%,which verifies the improved CNN network in this paper.The recognition performance of radar radiation sources.4.The FPGA acceleration platform for radar radiation source identification based on improved CNN has obvious acceleration effect.The performance of the accelerator is analyzed,and it is found that the recognition efficiency of the accelerator is 8.3 times that of the CPU,5 times that of the GPU,and the computing power is up to 323.049 GOP/s,which verifies the acceleration performance of the FPGA accelerator designed in this paper.