Design And Implementation Of High-Speed AD Data Acquisition And Processing System Based On Domestic Chips

High-speed AD data acquisition and processing system is widely used in radar,microwave detection and other fields,but the selection of high-speed AD data acquisition and processing devices are mostly based on foreign chips,and the degree of localization is low,which is very easy to cause the risk of "necking".At present,there is no application case of developing high-speed AD data acquisition and processing system with domestic chips in the domestic market.This thesis researches a high-speed AD data acquisition and processing system based on domestic chips based on the demand of a localization replacement project of a vehicle radar.The research carried out in this thesis and the research results obtained are as follows:1.The overall requirements,key technologies and key device selection of the high-speed AD data acquisition and processing system based on domestic chips are analyzed,the type,performance,reliability,production capacity and compatibility of the domestic chips selected for the system are evaluated,and the system hardware platform is designed.The system hardware platform was designed.A domestic FPGA with integrated "ARM+FPGA" architecture was adopted to replace the "DSP+FPGA" architecture in the original system,and the data transmission link of the system was optimized by using the faster JESD204 B serial transmission protocol instead of the LVDS parallel transmission protocol in the original system.The LVDS parallel transmission protocol in the original system was replaced by the JESD204 B serial transmission protocol.The adaptation and compatibility between the domestic chips were debugged to form an independent and controllable domestic alternative technology solution for high-speed AD data acquisition and processing system based on domestic chips.2.The system adopts a modular design approach,and the overall design plan includes two parts: the AD data acquisition module and the FPGA master control module.interface configuration,BRAM storage design and serial transceiver controller module.3.The prototype of high-speed AD data acquisition and processing system based on the domestic chip is designed and produced,and the system test platform is built to complete the verification tests on the locking output of high-precision clock,AD down-conversion,JESD204 B protocol establishment and transmission,PL receiving data logic and AXI protocol transmission of BRAM storage data functions in the actual vehicle environment.The results show that the high-speed AD data acquisition and processing system based on the domestic chip achieves the sampling accuracy of 9 bits,sampling frequency of400 MSPS,and data transmission rate of 4Gbit/s.The functions and performance indexes of the system meet the design requirements.The study provides a feasible reference solution for the domestic high-speed data acquisition and processing system.