Research And Design Of Analog Baseband Circuits For BLE Transmitters

BLE technology as an ultra-low-power,low-cost short-range communication technology has been widely used in smart devices.Few years,many domestic and foreign companies have carried out research in wireless communication,especially the research and development of BLE chips.The BLE chip involved in this article consists of a zero-IF transceiver,a power management module,and a register control module.Among them,the analog baseband circuit in the BLE transmitter is of great research significance as a bridge between digital baseband and RF circuit.Therefore,this paper mainly studies and designs the analog baseband circuit of BLE transmitter.The transmitter analogue baseband circuit consists mainly of a 12 bit 48MS/s segmented current steering DAC and a second-order low-pass filter.The design of the DAC includes input registers,decoder circuit,current source array and bias circuit,etc.The design of the LPF mainly includes the design of the operational amplifier and the resistor-capacitor in the external loop.In this paper,the decoding circuit has been optimized and the current source array has been weighted using R-2R resistors.A current-adjustable bias circuit is designed,in which the adjustment of the DAC output current is implemented via registers.The resistor-capacitor of the filter is constructed using a multi-bit-controlled array structure,and the bandwidth and superiority of the filter are modified by configuring different capacitance and resistance values,which in turn improves the overall circuit dynamic performance.The circuit design in this paper is based on a TSMC 65 nm process implementation and post-simulation results show that the overall power consumption of the analogue baseband circuit is 1.58 mW at 1.5V supply voltage,with an area of 0.2mm~2 and a SFDR of 76 dB,which meets the BLE transmitter performance requirements.