Research And Implementation Of Digital Test Vector Synthesis Technology In Integrated Circuit Testing

The importance of the integrated circuit industry as the core of the information technology industry is self-evident.Integrated circuit testing,as a downstream industry in the integrated circuit industry,plays an important role in the entire integrated circuit industry chain.With the continuous improvement of the integration scale and working frequency of integrated circuits,higher requirements have been put forward for integrated circuit testing equipment.The testing of digital circuits has the widest application scenario and the greatest demand among all tests;General digital circuit testing includes DC testing,functional testing,and AC testing,with the core being functional testing of digital circuits.Functional testing requires inputting digital test vectors into the tested digital circuit according to certain rules,and collecting and analyzing the output results.Therefore,digital test vector synthesis technology is crucial for digital circuit testing.The thesis studies the two existing test vector synthesis methods based on Ser Des and delay,compares their advantages and disadvantages,and proposes a digital test vector synthesis method based on DRP and high-speed transceivers(GTX).This digital test vector synthesis method optimized the recoding format of test vectors,improved the utilization of test vector storage space,and ultimately achieved a single channel test vector storage depth of up to 2G Vectors.By introducing DRP into the traditional Ser Des based test vector synthesis method,the problem of excessive step value in testing rate adjustment was solved,achieving a resolution of 1Mbps for testing vector output rate adjustment.In addition,the final hardware implementation of the digital testing module has a maximum test vector output rate of 1Gbps and a test vector edge resolution of156.25 ps.The thesis presents a hardware implementation of the designed digital test vector synthesis method based on a digital testing module with FPGA devices as the core,and designs the key FPGA functional modules to achieve test vector synthesis.Finally,the128 channel digital testing module completed based on this design was combined with the testing system to verify the digital test vector synthesis output function and its various indicators,including testing the speed,depth,multi-channel synchronization accuracy of the excitation waveform,etc.Observe and measure relevant indicators through an oscilloscope to meet the design requirements of the project.The results of this project effectively improve the efficiency of digital test vector synthesis and the flexibility of its output rate adjustment,thus adapting to more complex digital circuit testing scenarios.