On-chip Reliability Enhancement Technology Of Physical Unclonable Function

With the advent of the era of Internet of things and big data,the frequent occurrence of problems such as information leakage and information tampering makes people realize the importance of information security.Physical unclonable function(PUF)is an innovative primitive for IC authentication and key security supply.By embedding PUF into the chip and using the process deviation to generate a unique key,each chip can be given a unique identity tag,which can prevent the occurrence of information security problems such as chip forgery and data theft.However,the changes of power supply voltage and ambient temperature may affect the stability of PUF and increase the bit error rate.The traditional PUF reliability enhancement technology needs to test all chips,which will bring great time and cost.It is of great scientific significance and engineering value to study the on-chip reliability enhancement technology of physical unclonable chips.Therefore,a self repairing multimode SRAM PUF circuit is proposed in this thesis.In this thesis,a multimode SRAM PUF unit is designed.Through the control mode,three different keys can be obtained in the same PUF unit.Through the voltage decision characteristics,the response generated by PUF strongly depends on the electrical characteristics of NMOS to the tube and is independent of each other.In this thesis,an on-chip reliability enhancement technology based on multimode SRAM PUF unit is proposed.Mode 1 and mode 2 with the same structure are solidified into two bit independent PUF units,and mode 3 is used as a repair unit.Using the voltage tilt preselection mechanism,an on-chip self-test system is designed to test the stability of mode 1 and mode 2.If there is unstable positioning,mode 3 will be used to repair unstable mode 1 or mode 2 through mode switching.At the same time,the system also needs to conduct tilt preselection test for mode 3 again.When mode 3passes the test,the unstable mode is repaired successfully,and the bits that are not repaired successfully will be discarded,so as to enhance the on-chip reliability of PUF circuit.In this thesis,the circuit design and layout design of self repairing multimode SRAM PUF are completed based on 55 nm CMOS process.Monte Carlo simulation shows that the proposed multimode SRAM PUF unit has ideal uniformity,randomness and independence.When the power supply voltage and ambient temperature change,the intrinsic bit error rate of multimode SRAM PUF unit is 4.5%.After using the proposed self detection and self repair technology,the repair rate of unstable bits is as high as 95.2%,and only 0.2% of unstable bits are discarded because they cannot be repaired.Therefore,the proposed self repairing multimode SRAM PUF circuit has the characteristics of large number of effective challenge response pairs and high reliability.At the same time,it can greatly improve the test efficiency of PUF chip,and is expected to realize the large-scale application of physical unclonable function circuit.